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path: root/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mm_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/mm_gv11b.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
index 9be8352a..7ba8f74f 100644
--- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
@@ -260,10 +260,10 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
260 * checking bit 36 of the phsyical address. So if a mapping should allocte lines 260 * checking bit 36 of the phsyical address. So if a mapping should allocte lines
261 * in the L3 this bit must be set. 261 * in the L3 this bit must be set.
262 */ 262 */
263u64 gv11b_gpu_phys_addr(struct gk20a *g, 263static u64 gv11b_gpu_phys_addr(struct gk20a *g,
264 struct nvgpu_gmmu_attrs *attrs, u64 phys) 264 struct nvgpu_gmmu_attrs *attrs, u64 phys)
265{ 265{
266 if (attrs->t19x_attrs.l3_alloc) 266 if (attrs && attrs->t19x_attrs.l3_alloc)
267 return phys | NVGPU_L3_ALLOC_BIT; 267 return phys | NVGPU_L3_ALLOC_BIT;
268 268
269 return phys; 269 return phys;
@@ -322,6 +322,7 @@ static int gv11b_init_bar2_mm_hw_setup(struct gk20a *g)
322void gv11b_init_mm(struct gpu_ops *gops) 322void gv11b_init_mm(struct gpu_ops *gops)
323{ 323{
324 gp10b_init_mm(gops); 324 gp10b_init_mm(gops);
325 gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr;
325 gops->mm.is_bar1_supported = gv11b_mm_is_bar1_supported; 326 gops->mm.is_bar1_supported = gv11b_mm_is_bar1_supported;
326 gops->mm.init_inst_block = gv11b_init_inst_block; 327 gops->mm.init_inst_block = gv11b_init_inst_block;
327 gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending; 328 gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;