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path: root/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mc_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/mc_gv11b.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
index dbeb0645..31600828 100644
--- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
@@ -71,24 +71,24 @@ bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0)
71 return (((mc_intr_0 & mc_intr_hub_pending_f()) != 0U) ? true : false); 71 return (((mc_intr_0 & mc_intr_hub_pending_f()) != 0U) ? true : false);
72} 72}
73 73
74bool gv11b_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, 74bool gv11b_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id)
75 u32 *eng_intr_pending)
76{ 75{
77 u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0)); 76 u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0));
78 u32 stall_intr, eng_intr_mask; 77 u32 stall_intr, eng_intr_mask;
79 78
80 eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id); 79 eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id);
81 *eng_intr_pending = mc_intr_0 & eng_intr_mask; 80 if ((mc_intr_0 & eng_intr_mask) != 0U) {
81 return true;
82 }
82 83
83 stall_intr = mc_intr_pfifo_pending_f() | 84 stall_intr = mc_intr_pfifo_pending_f() |
84 mc_intr_hub_pending_f() | 85 mc_intr_hub_pending_f() |
85 mc_intr_priv_ring_pending_f() | 86 mc_intr_priv_ring_pending_f() |
86 mc_intr_pbus_pending_f() | 87 mc_intr_pbus_pending_f() |
87 mc_intr_ltc_pending_f(); 88 mc_intr_ltc_pending_f();
89 if ((mc_intr_0 & stall_intr) != 0U) {
90 return true;
91 }
88 92
89 nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr, 93 return false;
90 "mc_intr_0 = 0x%08x, eng_intr = 0x%08x",
91 mc_intr_0 & stall_intr, *eng_intr_pending);
92
93 return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U;
94} 94}