diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h | 128 |
1 files changed, 102 insertions, 26 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h index 6ccbc266..c6f51acb 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h | |||
@@ -148,7 +148,7 @@ static inline u32 ram_in_page_dir_base_lo_w(void) | |||
148 | } | 148 | } |
149 | static inline u32 ram_in_page_dir_base_hi_f(u32 v) | 149 | static inline u32 ram_in_page_dir_base_hi_f(u32 v) |
150 | { | 150 | { |
151 | return (v & 0xff) << 0; | 151 | return (v & 0xffffffff) << 0; |
152 | } | 152 | } |
153 | static inline u32 ram_in_page_dir_base_hi_w(void) | 153 | static inline u32 ram_in_page_dir_base_hi_w(void) |
154 | { | 154 | { |
@@ -354,14 +354,6 @@ static inline u32 ram_fc_allowed_syncpoints_w(void) | |||
354 | { | 354 | { |
355 | return 58; | 355 | return 58; |
356 | } | 356 | } |
357 | static inline u32 ram_fc_syncpointa_w(void) | ||
358 | { | ||
359 | return 41; | ||
360 | } | ||
361 | static inline u32 ram_fc_syncpointb_w(void) | ||
362 | { | ||
363 | return 42; | ||
364 | } | ||
365 | static inline u32 ram_fc_target_w(void) | 357 | static inline u32 ram_fc_target_w(void) |
366 | { | 358 | { |
367 | return 43; | 359 | return 43; |
@@ -444,46 +436,130 @@ static inline u32 ram_userd_gp_top_level_get_hi_w(void) | |||
444 | } | 436 | } |
445 | static inline u32 ram_rl_entry_size_v(void) | 437 | static inline u32 ram_rl_entry_size_v(void) |
446 | { | 438 | { |
439 | return 0x00000010; | ||
440 | } | ||
441 | static inline u32 ram_rl_entry_type_f(u32 v) | ||
442 | { | ||
443 | return (v & 0x1) << 0; | ||
444 | } | ||
445 | static inline u32 ram_rl_entry_type_channel_v(void) | ||
446 | { | ||
447 | return 0x00000000; | ||
448 | } | ||
449 | static inline u32 ram_rl_entry_type_tsg_v(void) | ||
450 | { | ||
451 | return 0x00000001; | ||
452 | } | ||
453 | static inline u32 ram_rl_entry_id_f(u32 v) | ||
454 | { | ||
455 | return (v & 0xfff) << 0; | ||
456 | } | ||
457 | static inline u32 ram_rl_entry_chan_runqueue_selector_f(u32 v) | ||
458 | { | ||
459 | return (v & 0x1) << 1; | ||
460 | } | ||
461 | static inline u32 ram_rl_entry_chan_inst_target_f(u32 v) | ||
462 | { | ||
463 | return (v & 0x3) << 4; | ||
464 | } | ||
465 | static inline u32 ram_rl_entry_chan_inst_target_target_sys_mem_ncoh_v(void) | ||
466 | { | ||
467 | return 0x00000003; | ||
468 | } | ||
469 | static inline u32 ram_rl_entry_chan_userd_target_f(u32 v) | ||
470 | { | ||
471 | return (v & 0x3) << 6; | ||
472 | } | ||
473 | static inline u32 ram_rl_entry_chan_userd_target_target_vid_mem_v(void) | ||
474 | { | ||
475 | return 0x00000000; | ||
476 | } | ||
477 | static inline u32 ram_rl_entry_chan_userd_target_target_vid_mem_nvlink_coh_v(void) | ||
478 | { | ||
479 | return 0x00000001; | ||
480 | } | ||
481 | static inline u32 ram_rl_entry_chan_userd_target_target_sys_mem_coh_v(void) | ||
482 | { | ||
483 | return 0x00000002; | ||
484 | } | ||
485 | static inline u32 ram_rl_entry_chan_userd_target_target_sys_mem_ncoh_v(void) | ||
486 | { | ||
487 | return 0x00000003; | ||
488 | } | ||
489 | static inline u32 ram_rl_entry_chan_userd_ptr_lo_f(u32 v) | ||
490 | { | ||
491 | return (v & 0xffffff) << 8; | ||
492 | } | ||
493 | static inline u32 ram_rl_entry_chan_userd_ptr_hi_f(u32 v) | ||
494 | { | ||
495 | return (v & 0xffffffff) << 0; | ||
496 | } | ||
497 | static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_inst_ptr_align_shift_v(void) | ||
498 | { | ||
499 | return 0x0000000c; | ||
500 | } | ||
501 | static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_userd_ptr_align_shift_v(void) | ||
502 | { | ||
503 | return 0x00000008; | ||
504 | } | ||
505 | static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_userd_align_shift_v(void) | ||
506 | { | ||
447 | return 0x00000008; | 507 | return 0x00000008; |
448 | } | 508 | } |
449 | static inline u32 ram_rl_entry_chid_f(u32 v) | 509 | static inline u32 ram_rl_entry_chid_f(u32 v) |
450 | { | 510 | { |
451 | return (v & 0xfff) << 0; | 511 | return (v & 0xfff) << 0; |
452 | } | 512 | } |
453 | static inline u32 ram_rl_entry_id_f(u32 v) | 513 | static inline u32 ram_rl_entry_chan_inst_ptr_lo_f(u32 v) |
454 | { | 514 | { |
455 | return (v & 0xfff) << 0; | 515 | return (v & 0xfffff) << 12; |
456 | } | 516 | } |
457 | static inline u32 ram_rl_entry_type_f(u32 v) | 517 | static inline u32 ram_rl_entry_chan_inst_ptr_hi_f(u32 v) |
458 | { | 518 | { |
459 | return (v & 0x1) << 13; | 519 | return (v & 0xffffffff) << 0; |
460 | } | 520 | } |
461 | static inline u32 ram_rl_entry_type_chid_f(void) | 521 | static inline u32 ram_rl_entry_tsg_vmid_f(u32 v) |
462 | { | 522 | { |
463 | return 0x0; | 523 | return (v & 0xff) << 4; |
464 | } | 524 | } |
465 | static inline u32 ram_rl_entry_type_tsg_f(void) | 525 | static inline u32 ram_rl_entry_tsg_timeslice_scale_f(u32 v) |
466 | { | 526 | { |
467 | return 0x2000; | 527 | return (v & 0xf) << 16; |
468 | } | 528 | } |
469 | static inline u32 ram_rl_entry_timeslice_scale_f(u32 v) | 529 | static inline u32 ram_rl_entry_tsg_timeslice_scale_entry_tsg_timeslice_scale_3_v(void) |
470 | { | 530 | { |
471 | return (v & 0xf) << 14; | 531 | return 0x00000003; |
472 | } | 532 | } |
473 | static inline u32 ram_rl_entry_timeslice_scale_3_f(void) | 533 | static inline u32 ram_rl_entry_tsg_timeslice_timeout_f(u32 v) |
474 | { | 534 | { |
475 | return 0xc000; | 535 | return (v & 0xff) << 24; |
476 | } | 536 | } |
477 | static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v) | 537 | static inline u32 ram_rl_entry_tsg_timeslice_timeout_entry_tsg_timeslice_timeout_128_v(void) |
478 | { | 538 | { |
479 | return (v & 0xff) << 18; | 539 | return 0x00000080; |
480 | } | 540 | } |
481 | static inline u32 ram_rl_entry_timeslice_timeout_128_f(void) | 541 | static inline u32 ram_rl_entry_tsg_timeslice_timeout_entry_tsg_timeslice_timeout_disable_v(void) |
482 | { | 542 | { |
483 | return 0x2000000; | 543 | return 0x00000000; |
484 | } | 544 | } |
485 | static inline u32 ram_rl_entry_tsg_length_f(u32 v) | 545 | static inline u32 ram_rl_entry_tsg_length_f(u32 v) |
486 | { | 546 | { |
487 | return (v & 0x3f) << 26; | 547 | return (v & 0xff) << 0; |
548 | } | ||
549 | static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_init_v(void) | ||
550 | { | ||
551 | return 0x00000000; | ||
552 | } | ||
553 | static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_min_v(void) | ||
554 | { | ||
555 | return 0x00000001; | ||
556 | } | ||
557 | static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_max_v(void) | ||
558 | { | ||
559 | return 0x00000080; | ||
560 | } | ||
561 | static inline u32 ram_rl_entry_tsg_tsgid_f(u32 v) | ||
562 | { | ||
563 | return (v & 0xfff) << 0; | ||
488 | } | 564 | } |
489 | #endif | 565 | #endif |