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Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hw_pbdma_gv11b.h')
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_pbdma_gv11b.h633
1 files changed, 0 insertions, 633 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hw_pbdma_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_pbdma_gv11b.h
deleted file mode 100644
index c4d3a631..00000000
--- a/drivers/gpu/nvgpu/gv11b/hw_pbdma_gv11b.h
+++ /dev/null
@@ -1,633 +0,0 @@
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16/*
17 * Function naming determines intended use:
18 *
19 * <x>_r(void) : Returns the offset for register <x>.
20 *
21 * <x>_o(void) : Returns the offset for element <x>.
22 *
23 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
24 *
25 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
26 *
27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
28 * and masked to place it at field <y> of register <x>. This value
29 * can be |'d with others to produce a full register value for
30 * register <x>.
31 *
32 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
33 * value can be ~'d and then &'d to clear the value of field <y> for
34 * register <x>.
35 *
36 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
37 * to place it at field <y> of register <x>. This value can be |'d
38 * with others to produce a full register value for <x>.
39 *
40 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
42 * This value is suitable for direct comparison with other unshifted
43 * values appropriate for use in field <y> of register <x>.
44 *
45 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
46 * field <y> of register <x>. This value is suitable for direct
47 * comparison with unshifted values appropriate for use in field <y>
48 * of register <x>.
49 */
50#ifndef _hw_pbdma_gv11b_h_
51#define _hw_pbdma_gv11b_h_
52
53static inline u32 pbdma_gp_entry1_r(void)
54{
55 return 0x10000004;
56}
57static inline u32 pbdma_gp_entry1_get_hi_v(u32 r)
58{
59 return (r >> 0) & 0xff;
60}
61static inline u32 pbdma_gp_entry1_length_f(u32 v)
62{
63 return (v & 0x1fffff) << 10;
64}
65static inline u32 pbdma_gp_entry1_length_v(u32 r)
66{
67 return (r >> 10) & 0x1fffff;
68}
69static inline u32 pbdma_gp_base_r(u32 i)
70{
71 return 0x00040048 + i*8192;
72}
73static inline u32 pbdma_gp_base__size_1_v(void)
74{
75 return 0x00000003;
76}
77static inline u32 pbdma_gp_base_offset_f(u32 v)
78{
79 return (v & 0x1fffffff) << 3;
80}
81static inline u32 pbdma_gp_base_rsvd_s(void)
82{
83 return 3;
84}
85static inline u32 pbdma_gp_base_hi_r(u32 i)
86{
87 return 0x0004004c + i*8192;
88}
89static inline u32 pbdma_gp_base_hi_offset_f(u32 v)
90{
91 return (v & 0xff) << 0;
92}
93static inline u32 pbdma_gp_base_hi_limit2_f(u32 v)
94{
95 return (v & 0x1f) << 16;
96}
97static inline u32 pbdma_gp_fetch_r(u32 i)
98{
99 return 0x00040050 + i*8192;
100}
101static inline u32 pbdma_gp_get_r(u32 i)
102{
103 return 0x00040014 + i*8192;
104}
105static inline u32 pbdma_gp_put_r(u32 i)
106{
107 return 0x00040000 + i*8192;
108}
109static inline u32 pbdma_pb_fetch_r(u32 i)
110{
111 return 0x00040054 + i*8192;
112}
113static inline u32 pbdma_pb_fetch_hi_r(u32 i)
114{
115 return 0x00040058 + i*8192;
116}
117static inline u32 pbdma_get_r(u32 i)
118{
119 return 0x00040018 + i*8192;
120}
121static inline u32 pbdma_get_hi_r(u32 i)
122{
123 return 0x0004001c + i*8192;
124}
125static inline u32 pbdma_put_r(u32 i)
126{
127 return 0x0004005c + i*8192;
128}
129static inline u32 pbdma_put_hi_r(u32 i)
130{
131 return 0x00040060 + i*8192;
132}
133static inline u32 pbdma_pb_header_r(u32 i)
134{
135 return 0x00040084 + i*8192;
136}
137static inline u32 pbdma_pb_header_priv_user_f(void)
138{
139 return 0x0;
140}
141static inline u32 pbdma_pb_header_method_zero_f(void)
142{
143 return 0x0;
144}
145static inline u32 pbdma_pb_header_subchannel_zero_f(void)
146{
147 return 0x0;
148}
149static inline u32 pbdma_pb_header_level_main_f(void)
150{
151 return 0x0;
152}
153static inline u32 pbdma_pb_header_first_true_f(void)
154{
155 return 0x400000;
156}
157static inline u32 pbdma_pb_header_type_inc_f(void)
158{
159 return 0x20000000;
160}
161static inline u32 pbdma_pb_header_type_non_inc_f(void)
162{
163 return 0x60000000;
164}
165static inline u32 pbdma_hdr_shadow_r(u32 i)
166{
167 return 0x00040118 + i*8192;
168}
169static inline u32 pbdma_subdevice_r(u32 i)
170{
171 return 0x00040094 + i*8192;
172}
173static inline u32 pbdma_subdevice_id_f(u32 v)
174{
175 return (v & 0xfff) << 0;
176}
177static inline u32 pbdma_subdevice_status_active_f(void)
178{
179 return 0x10000000;
180}
181static inline u32 pbdma_subdevice_channel_dma_enable_f(void)
182{
183 return 0x20000000;
184}
185static inline u32 pbdma_method0_r(u32 i)
186{
187 return 0x000400c0 + i*8192;
188}
189static inline u32 pbdma_method0_fifo_size_v(void)
190{
191 return 0x00000004;
192}
193static inline u32 pbdma_method0_addr_f(u32 v)
194{
195 return (v & 0xfff) << 2;
196}
197static inline u32 pbdma_method0_addr_v(u32 r)
198{
199 return (r >> 2) & 0xfff;
200}
201static inline u32 pbdma_method0_subch_v(u32 r)
202{
203 return (r >> 16) & 0x7;
204}
205static inline u32 pbdma_method0_first_true_f(void)
206{
207 return 0x400000;
208}
209static inline u32 pbdma_method0_valid_true_f(void)
210{
211 return 0x80000000;
212}
213static inline u32 pbdma_method1_r(u32 i)
214{
215 return 0x000400c8 + i*8192;
216}
217static inline u32 pbdma_method2_r(u32 i)
218{
219 return 0x000400d0 + i*8192;
220}
221static inline u32 pbdma_method3_r(u32 i)
222{
223 return 0x000400d8 + i*8192;
224}
225static inline u32 pbdma_data0_r(u32 i)
226{
227 return 0x000400c4 + i*8192;
228}
229static inline u32 pbdma_acquire_r(u32 i)
230{
231 return 0x00040030 + i*8192;
232}
233static inline u32 pbdma_acquire_retry_man_2_f(void)
234{
235 return 0x2;
236}
237static inline u32 pbdma_acquire_retry_exp_2_f(void)
238{
239 return 0x100;
240}
241static inline u32 pbdma_acquire_timeout_exp_f(u32 v)
242{
243 return (v & 0xf) << 11;
244}
245static inline u32 pbdma_acquire_timeout_exp_max_v(void)
246{
247 return 0x0000000f;
248}
249static inline u32 pbdma_acquire_timeout_exp_max_f(void)
250{
251 return 0x7800;
252}
253static inline u32 pbdma_acquire_timeout_man_f(u32 v)
254{
255 return (v & 0xffff) << 15;
256}
257static inline u32 pbdma_acquire_timeout_man_max_v(void)
258{
259 return 0x0000ffff;
260}
261static inline u32 pbdma_acquire_timeout_man_max_f(void)
262{
263 return 0x7fff8000;
264}
265static inline u32 pbdma_acquire_timeout_en_enable_f(void)
266{
267 return 0x80000000;
268}
269static inline u32 pbdma_acquire_timeout_en_disable_f(void)
270{
271 return 0x0;
272}
273static inline u32 pbdma_status_r(u32 i)
274{
275 return 0x00040100 + i*8192;
276}
277static inline u32 pbdma_channel_r(u32 i)
278{
279 return 0x00040120 + i*8192;
280}
281static inline u32 pbdma_signature_r(u32 i)
282{
283 return 0x00040010 + i*8192;
284}
285static inline u32 pbdma_signature_hw_valid_f(void)
286{
287 return 0xface;
288}
289static inline u32 pbdma_signature_sw_zero_f(void)
290{
291 return 0x0;
292}
293static inline u32 pbdma_userd_r(u32 i)
294{
295 return 0x00040008 + i*8192;
296}
297static inline u32 pbdma_userd_target_vid_mem_f(void)
298{
299 return 0x0;
300}
301static inline u32 pbdma_userd_target_sys_mem_coh_f(void)
302{
303 return 0x2;
304}
305static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void)
306{
307 return 0x3;
308}
309static inline u32 pbdma_userd_addr_f(u32 v)
310{
311 return (v & 0x7fffff) << 9;
312}
313static inline u32 pbdma_config_r(u32 i)
314{
315 return 0x000400f4 + i*8192;
316}
317static inline u32 pbdma_config_l2_evict_first_f(void)
318{
319 return 0x0;
320}
321static inline u32 pbdma_config_l2_evict_normal_f(void)
322{
323 return 0x1;
324}
325static inline u32 pbdma_config_l2_evict_last_f(void)
326{
327 return 0x2;
328}
329static inline u32 pbdma_config_ce_split_enable_f(void)
330{
331 return 0x0;
332}
333static inline u32 pbdma_config_ce_split_disable_f(void)
334{
335 return 0x10;
336}
337static inline u32 pbdma_config_auth_level_non_privileged_f(void)
338{
339 return 0x0;
340}
341static inline u32 pbdma_config_auth_level_privileged_f(void)
342{
343 return 0x100;
344}
345static inline u32 pbdma_config_userd_writeback_disable_f(void)
346{
347 return 0x0;
348}
349static inline u32 pbdma_config_userd_writeback_enable_f(void)
350{
351 return 0x1000;
352}
353static inline u32 pbdma_userd_hi_r(u32 i)
354{
355 return 0x0004000c + i*8192;
356}
357static inline u32 pbdma_userd_hi_addr_f(u32 v)
358{
359 return (v & 0xff) << 0;
360}
361static inline u32 pbdma_hce_ctrl_r(u32 i)
362{
363 return 0x000400e4 + i*8192;
364}
365static inline u32 pbdma_hce_ctrl_hce_priv_mode_yes_f(void)
366{
367 return 0x20;
368}
369static inline u32 pbdma_intr_0_r(u32 i)
370{
371 return 0x00040108 + i*8192;
372}
373static inline u32 pbdma_intr_0_memreq_v(u32 r)
374{
375 return (r >> 0) & 0x1;
376}
377static inline u32 pbdma_intr_0_memreq_pending_f(void)
378{
379 return 0x1;
380}
381static inline u32 pbdma_intr_0_memack_timeout_pending_f(void)
382{
383 return 0x2;
384}
385static inline u32 pbdma_intr_0_memack_extra_pending_f(void)
386{
387 return 0x4;
388}
389static inline u32 pbdma_intr_0_memdat_timeout_pending_f(void)
390{
391 return 0x8;
392}
393static inline u32 pbdma_intr_0_memdat_extra_pending_f(void)
394{
395 return 0x10;
396}
397static inline u32 pbdma_intr_0_memflush_pending_f(void)
398{
399 return 0x20;
400}
401static inline u32 pbdma_intr_0_memop_pending_f(void)
402{
403 return 0x40;
404}
405static inline u32 pbdma_intr_0_lbconnect_pending_f(void)
406{
407 return 0x80;
408}
409static inline u32 pbdma_intr_0_lbreq_pending_f(void)
410{
411 return 0x100;
412}
413static inline u32 pbdma_intr_0_lback_timeout_pending_f(void)
414{
415 return 0x200;
416}
417static inline u32 pbdma_intr_0_lback_extra_pending_f(void)
418{
419 return 0x400;
420}
421static inline u32 pbdma_intr_0_lbdat_timeout_pending_f(void)
422{
423 return 0x800;
424}
425static inline u32 pbdma_intr_0_lbdat_extra_pending_f(void)
426{
427 return 0x1000;
428}
429static inline u32 pbdma_intr_0_gpfifo_pending_f(void)
430{
431 return 0x2000;
432}
433static inline u32 pbdma_intr_0_gpptr_pending_f(void)
434{
435 return 0x4000;
436}
437static inline u32 pbdma_intr_0_gpentry_pending_f(void)
438{
439 return 0x8000;
440}
441static inline u32 pbdma_intr_0_gpcrc_pending_f(void)
442{
443 return 0x10000;
444}
445static inline u32 pbdma_intr_0_pbptr_pending_f(void)
446{
447 return 0x20000;
448}
449static inline u32 pbdma_intr_0_pbentry_pending_f(void)
450{
451 return 0x40000;
452}
453static inline u32 pbdma_intr_0_pbcrc_pending_f(void)
454{
455 return 0x80000;
456}
457static inline u32 pbdma_intr_0_method_pending_f(void)
458{
459 return 0x200000;
460}
461static inline u32 pbdma_intr_0_methodcrc_pending_f(void)
462{
463 return 0x400000;
464}
465static inline u32 pbdma_intr_0_device_pending_f(void)
466{
467 return 0x800000;
468}
469static inline u32 pbdma_intr_0_semaphore_pending_f(void)
470{
471 return 0x2000000;
472}
473static inline u32 pbdma_intr_0_acquire_pending_f(void)
474{
475 return 0x4000000;
476}
477static inline u32 pbdma_intr_0_pri_pending_f(void)
478{
479 return 0x8000000;
480}
481static inline u32 pbdma_intr_0_no_ctxsw_seg_pending_f(void)
482{
483 return 0x20000000;
484}
485static inline u32 pbdma_intr_0_pbseg_pending_f(void)
486{
487 return 0x40000000;
488}
489static inline u32 pbdma_intr_0_signature_pending_f(void)
490{
491 return 0x80000000;
492}
493static inline u32 pbdma_intr_1_r(u32 i)
494{
495 return 0x00040148 + i*8192;
496}
497static inline u32 pbdma_intr_en_0_r(u32 i)
498{
499 return 0x0004010c + i*8192;
500}
501static inline u32 pbdma_intr_en_0_lbreq_enabled_f(void)
502{
503 return 0x100;
504}
505static inline u32 pbdma_intr_en_1_r(u32 i)
506{
507 return 0x0004014c + i*8192;
508}
509static inline u32 pbdma_intr_stall_r(u32 i)
510{
511 return 0x0004013c + i*8192;
512}
513static inline u32 pbdma_intr_stall_lbreq_enabled_f(void)
514{
515 return 0x100;
516}
517static inline u32 pbdma_udma_nop_r(void)
518{
519 return 0x00000008;
520}
521static inline u32 pbdma_allowed_syncpoints_r(u32 i)
522{
523 return 0x000400e8 + i*8192;
524}
525static inline u32 pbdma_allowed_syncpoints_0_valid_f(u32 v)
526{
527 return (v & 0x1) << 31;
528}
529static inline u32 pbdma_allowed_syncpoints_0_index_f(u32 v)
530{
531 return (v & 0x7fff) << 16;
532}
533static inline u32 pbdma_allowed_syncpoints_0_index_v(u32 r)
534{
535 return (r >> 16) & 0x7fff;
536}
537static inline u32 pbdma_allowed_syncpoints_1_valid_f(u32 v)
538{
539 return (v & 0x1) << 15;
540}
541static inline u32 pbdma_allowed_syncpoints_1_index_f(u32 v)
542{
543 return (v & 0x7fff) << 0;
544}
545static inline u32 pbdma_runlist_timeslice_r(u32 i)
546{
547 return 0x000400f8 + i*8192;
548}
549static inline u32 pbdma_runlist_timeslice_timeout_128_f(void)
550{
551 return 0x80;
552}
553static inline u32 pbdma_runlist_timeslice_timescale_3_f(void)
554{
555 return 0x3000;
556}
557static inline u32 pbdma_runlist_timeslice_enable_true_f(void)
558{
559 return 0x10000000;
560}
561static inline u32 pbdma_target_r(u32 i)
562{
563 return 0x000400ac + i*8192;
564}
565static inline u32 pbdma_target_engine_sw_f(void)
566{
567 return 0x1f;
568}
569static inline u32 pbdma_target_eng_ctx_valid_true_f(void)
570{
571 return 0x10000;
572}
573static inline u32 pbdma_target_eng_ctx_valid_false_f(void)
574{
575 return 0x0;
576}
577static inline u32 pbdma_target_ce_ctx_valid_true_f(void)
578{
579 return 0x20000;
580}
581static inline u32 pbdma_target_ce_ctx_valid_false_f(void)
582{
583 return 0x0;
584}
585static inline u32 pbdma_target_host_tsg_event_reason_pbdma_idle_f(void)
586{
587 return 0x0;
588}
589static inline u32 pbdma_target_host_tsg_event_reason_semaphore_acquire_failure_f(void)
590{
591 return 0x1000000;
592}
593static inline u32 pbdma_target_host_tsg_event_reason_tsg_yield_f(void)
594{
595 return 0x2000000;
596}
597static inline u32 pbdma_target_host_tsg_event_reason_host_subchannel_switch_f(void)
598{
599 return 0x3000000;
600}
601static inline u32 pbdma_target_should_send_tsg_event_true_f(void)
602{
603 return 0x20000000;
604}
605static inline u32 pbdma_target_should_send_tsg_event_false_f(void)
606{
607 return 0x0;
608}
609static inline u32 pbdma_target_needs_host_tsg_event_true_f(void)
610{
611 return 0x80000000;
612}
613static inline u32 pbdma_target_needs_host_tsg_event_false_f(void)
614{
615 return 0x0;
616}
617static inline u32 pbdma_set_channel_info_r(u32 i)
618{
619 return 0x000400fc + i*8192;
620}
621static inline u32 pbdma_set_channel_info_scg_type_graphics_compute0_f(void)
622{
623 return 0x0;
624}
625static inline u32 pbdma_set_channel_info_scg_type_compute1_f(void)
626{
627 return 0x1;
628}
629static inline u32 pbdma_set_channel_info_veid_f(u32 v)
630{
631 return (v & 0x3f) << 8;
632}
633#endif