diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h | 88 |
1 files changed, 2 insertions, 86 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h index 8af66362..7e9e2743 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h | |||
@@ -190,22 +190,6 @@ static inline u32 fifo_intr_0_lb_error_reset_f(void) | |||
190 | { | 190 | { |
191 | return 0x1000000; | 191 | return 0x1000000; |
192 | } | 192 | } |
193 | static inline u32 fifo_intr_0_replayable_fault_error_pending_f(void) | ||
194 | { | ||
195 | return 0x2000000; | ||
196 | } | ||
197 | static inline u32 fifo_intr_0_dropped_mmu_fault_pending_f(void) | ||
198 | { | ||
199 | return 0x8000000; | ||
200 | } | ||
201 | static inline u32 fifo_intr_0_dropped_mmu_fault_reset_f(void) | ||
202 | { | ||
203 | return 0x8000000; | ||
204 | } | ||
205 | static inline u32 fifo_intr_0_mmu_fault_pending_f(void) | ||
206 | { | ||
207 | return 0x10000000; | ||
208 | } | ||
209 | static inline u32 fifo_intr_0_pbdma_intr_pending_f(void) | 193 | static inline u32 fifo_intr_0_pbdma_intr_pending_f(void) |
210 | { | 194 | { |
211 | return 0x20000000; | 195 | return 0x20000000; |
@@ -230,14 +214,6 @@ static inline u32 fifo_intr_en_0_sched_error_m(void) | |||
230 | { | 214 | { |
231 | return 0x1 << 8; | 215 | return 0x1 << 8; |
232 | } | 216 | } |
233 | static inline u32 fifo_intr_en_0_mmu_fault_f(u32 v) | ||
234 | { | ||
235 | return (v & 0x1) << 28; | ||
236 | } | ||
237 | static inline u32 fifo_intr_en_0_mmu_fault_m(void) | ||
238 | { | ||
239 | return 0x1 << 28; | ||
240 | } | ||
241 | static inline u32 fifo_intr_en_1_r(void) | 217 | static inline u32 fifo_intr_en_1_r(void) |
242 | { | 218 | { |
243 | return 0x00002528; | 219 | return 0x00002528; |
@@ -262,62 +238,14 @@ static inline u32 fifo_intr_chsw_error_r(void) | |||
262 | { | 238 | { |
263 | return 0x0000256c; | 239 | return 0x0000256c; |
264 | } | 240 | } |
265 | static inline u32 fifo_intr_mmu_fault_id_r(void) | 241 | static inline u32 fifo_gpc_v(void) |
266 | { | ||
267 | return 0x0000259c; | ||
268 | } | ||
269 | static inline u32 fifo_intr_mmu_fault_eng_id_graphics_v(void) | ||
270 | { | ||
271 | return 0x00000040; | ||
272 | } | ||
273 | static inline u32 fifo_intr_mmu_fault_eng_id_graphics_f(void) | ||
274 | { | ||
275 | return 0x0; | ||
276 | } | ||
277 | static inline u32 fifo_intr_mmu_fault_inst_r(u32 i) | ||
278 | { | ||
279 | return 0x00002800 + i*16; | ||
280 | } | ||
281 | static inline u32 fifo_intr_mmu_fault_inst_ptr_v(u32 r) | ||
282 | { | ||
283 | return (r >> 0) & 0xfffffff; | ||
284 | } | ||
285 | static inline u32 fifo_intr_mmu_fault_inst_ptr_align_shift_v(void) | ||
286 | { | ||
287 | return 0x0000000c; | ||
288 | } | ||
289 | static inline u32 fifo_intr_mmu_fault_lo_r(u32 i) | ||
290 | { | ||
291 | return 0x00002804 + i*16; | ||
292 | } | ||
293 | static inline u32 fifo_intr_mmu_fault_hi_r(u32 i) | ||
294 | { | ||
295 | return 0x00002808 + i*16; | ||
296 | } | ||
297 | static inline u32 fifo_intr_mmu_fault_info_r(u32 i) | ||
298 | { | ||
299 | return 0x0000280c + i*16; | ||
300 | } | ||
301 | static inline u32 fifo_intr_mmu_fault_info_type_v(u32 r) | ||
302 | { | ||
303 | return (r >> 0) & 0x1f; | ||
304 | } | ||
305 | static inline u32 fifo_intr_mmu_fault_info_client_type_v(u32 r) | ||
306 | { | ||
307 | return (r >> 20) & 0x1; | ||
308 | } | ||
309 | static inline u32 fifo_intr_mmu_fault_info_client_type_gpc_v(void) | ||
310 | { | 242 | { |
311 | return 0x00000000; | 243 | return 0x00000000; |
312 | } | 244 | } |
313 | static inline u32 fifo_intr_mmu_fault_info_client_type_hub_v(void) | 245 | static inline u32 fifo_hub_v(void) |
314 | { | 246 | { |
315 | return 0x00000001; | 247 | return 0x00000001; |
316 | } | 248 | } |
317 | static inline u32 fifo_intr_mmu_fault_info_client_v(u32 r) | ||
318 | { | ||
319 | return (r >> 8) & 0x7f; | ||
320 | } | ||
321 | static inline u32 fifo_intr_pbdma_id_r(void) | 249 | static inline u32 fifo_intr_pbdma_id_r(void) |
322 | { | 250 | { |
323 | return 0x000025a0; | 251 | return 0x000025a0; |
@@ -394,18 +322,6 @@ static inline u32 fifo_preempt_id_f(u32 v) | |||
394 | { | 322 | { |
395 | return (v & 0xfff) << 0; | 323 | return (v & 0xfff) << 0; |
396 | } | 324 | } |
397 | static inline u32 fifo_trigger_mmu_fault_r(u32 i) | ||
398 | { | ||
399 | return 0x00002a30 + i*4; | ||
400 | } | ||
401 | static inline u32 fifo_trigger_mmu_fault_id_f(u32 v) | ||
402 | { | ||
403 | return (v & 0x1f) << 0; | ||
404 | } | ||
405 | static inline u32 fifo_trigger_mmu_fault_enable_f(u32 v) | ||
406 | { | ||
407 | return (v & 0x1) << 8; | ||
408 | } | ||
409 | static inline u32 fifo_engine_status_r(u32 i) | 325 | static inline u32 fifo_engine_status_r(u32 i) |
410 | { | 326 | { |
411 | return 0x00002640 + i*8; | 327 | return 0x00002640 + i*8; |