summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/hal_gv11b.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index fc059caa..8278d4e5 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -61,6 +61,7 @@
61#include "gp10b/mm_gp10b.h" 61#include "gp10b/mm_gp10b.h"
62#include "gp10b/pmu_gp10b.h" 62#include "gp10b/pmu_gp10b.h"
63#include "gp10b/gr_gp10b.h" 63#include "gp10b/gr_gp10b.h"
64#include "gp10b/fuse_gp10b.h"
64 65
65#include "gp106/pmu_gp106.h" 66#include "gp106/pmu_gp106.h"
66#include "gp106/acr_gp106.h" 67#include "gp106/acr_gp106.h"
@@ -684,6 +685,9 @@ static const struct gpu_ops gv11b_ops = {
684 .priv_ring = { 685 .priv_ring = {
685 .isr = gp10b_priv_ring_isr, 686 .isr = gp10b_priv_ring_isr,
686 }, 687 },
688 .fuse = {
689 .check_priv_security = gp10b_fuse_check_priv_security,
690 },
687 .chip_init_gpu_characteristics = gv11b_init_gpu_characteristics, 691 .chip_init_gpu_characteristics = gv11b_init_gpu_characteristics,
688 .get_litter_value = gv11b_get_litter_value, 692 .get_litter_value = gv11b_get_litter_value,
689}; 693};
@@ -691,8 +695,6 @@ static const struct gpu_ops gv11b_ops = {
691int gv11b_init_hal(struct gk20a *g) 695int gv11b_init_hal(struct gk20a *g)
692{ 696{
693 struct gpu_ops *gops = &g->ops; 697 struct gpu_ops *gops = &g->ops;
694 u32 val;
695 bool priv_security;
696 698
697 gops->ltc = gv11b_ops.ltc; 699 gops->ltc = gv11b_ops.ltc;
698 gops->ce2 = gv11b_ops.ce2; 700 gops->ce2 = gv11b_ops.ce2;
@@ -717,23 +719,18 @@ int gv11b_init_hal(struct gk20a *g)
717#endif 719#endif
718 gops->falcon = gv11b_ops.falcon; 720 gops->falcon = gv11b_ops.falcon;
719 gops->priv_ring = gv11b_ops.priv_ring; 721 gops->priv_ring = gv11b_ops.priv_ring;
722 gops->fuse = gv11b_ops.fuse;
720 723
721 /* Lone functions */ 724 /* Lone functions */
722 gops->chip_init_gpu_characteristics = 725 gops->chip_init_gpu_characteristics =
723 gv11b_ops.chip_init_gpu_characteristics; 726 gv11b_ops.chip_init_gpu_characteristics;
724 gops->get_litter_value = gv11b_ops.get_litter_value; 727 gops->get_litter_value = gv11b_ops.get_litter_value;
725 728
726 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
727 if (val) {
728 priv_security = true;
729 pr_err("priv security is enabled\n");
730 } else {
731 priv_security = false;
732 pr_err("priv security is disabled\n");
733 }
734 __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, false); 729 __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, false);
735 __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, priv_security); 730
736 __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, priv_security); 731 /* Read fuses to check if gpu needs to boot in secure/non-secure mode */
732 if (gops->fuse.check_priv_security(g))
733 return -EINVAL; /* Do not boot gpu */
737 734
738 /* priv security dependent ops */ 735 /* priv security dependent ops */
739 if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { 736 if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) {