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path: root/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 831b92f5..12b07d11 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -61,14 +61,15 @@ static bool gr_gv11b_is_valid_class(struct gk20a *g, u32 class_num)
61} 61}
62 62
63static int gr_gv11b_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, 63static int gr_gv11b_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc,
64 bool *post_event, struct channel_gk20a *fault_ch) 64 bool *post_event, struct channel_gk20a *fault_ch,
65 u32 *hww_global_esr)
65{ 66{
66 int ret = 0; 67 int ret = 0;
67 u32 offset = proj_gpc_stride_v() * gpc + 68 u32 offset = proj_gpc_stride_v() * gpc +
68 proj_tpc_in_gpc_stride_v() * tpc; 69 proj_tpc_in_gpc_stride_v() * tpc;
69 u32 lrf_ecc_status, shm_ecc_status; 70 u32 lrf_ecc_status, shm_ecc_status;
70 71
71 gr_gk20a_handle_sm_exception(g, gpc, tpc, post_event, fault_ch); 72 gr_gk20a_handle_sm_exception(g, gpc, tpc, post_event, fault_ch, hww_global_esr);
72 73
73 /* Check for LRF ECC errors. */ 74 /* Check for LRF ECC errors. */
74 lrf_ecc_status = gk20a_readl(g, 75 lrf_ecc_status = gk20a_readl(g,