diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 82 |
1 files changed, 81 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 0c0b4261..014ba537 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -556,6 +556,84 @@ static int gr_gv11b_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
556 | return ret; | 556 | return ret; |
557 | } | 557 | } |
558 | 558 | ||
559 | static int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc, | ||
560 | bool *post_event, struct channel_gk20a *fault_ch, | ||
561 | u32 *hww_global_esr) | ||
562 | { | ||
563 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); | ||
564 | u32 offset = gpc_stride * gpc; | ||
565 | u32 gcc_l15_ecc_status, gcc_l15_ecc_corrected_err_status = 0; | ||
566 | u32 gcc_l15_ecc_uncorrected_err_status = 0; | ||
567 | u32 gcc_l15_corrected_err_count_delta = 0; | ||
568 | u32 gcc_l15_uncorrected_err_count_delta = 0; | ||
569 | bool is_gcc_l15_ecc_corrected_total_err_overflow = 0; | ||
570 | bool is_gcc_l15_ecc_uncorrected_total_err_overflow = 0; | ||
571 | |||
572 | /* Check for gcc l15 ECC errors. */ | ||
573 | gcc_l15_ecc_status = gk20a_readl(g, | ||
574 | gr_pri_gpc0_gcc_l15_ecc_status_r() + offset); | ||
575 | gcc_l15_ecc_corrected_err_status = gcc_l15_ecc_status & | ||
576 | (gr_pri_gpc0_gcc_l15_ecc_status_corrected_err_bank0_m() | | ||
577 | gr_pri_gpc0_gcc_l15_ecc_status_corrected_err_bank1_m()); | ||
578 | gcc_l15_ecc_uncorrected_err_status = gcc_l15_ecc_status & | ||
579 | (gr_pri_gpc0_gcc_l15_ecc_status_uncorrected_err_bank0_m() | | ||
580 | gr_pri_gpc0_gcc_l15_ecc_status_uncorrected_err_bank1_m()); | ||
581 | |||
582 | if ((gcc_l15_ecc_corrected_err_status == 0) && (gcc_l15_ecc_uncorrected_err_status == 0)) | ||
583 | return 0; | ||
584 | |||
585 | gcc_l15_corrected_err_count_delta = | ||
586 | gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_v( | ||
587 | gk20a_readl(g, | ||
588 | gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + | ||
589 | offset)); | ||
590 | gcc_l15_uncorrected_err_count_delta = | ||
591 | gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_v( | ||
592 | gk20a_readl(g, | ||
593 | gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + | ||
594 | offset)); | ||
595 | is_gcc_l15_ecc_corrected_total_err_overflow = | ||
596 | gr_pri_gpc0_gcc_l15_ecc_status_corrected_err_total_counter_overflow_v(gcc_l15_ecc_status); | ||
597 | is_gcc_l15_ecc_uncorrected_total_err_overflow = | ||
598 | gr_pri_gpc0_gcc_l15_ecc_status_uncorrected_err_total_counter_overflow_v(gcc_l15_ecc_status); | ||
599 | |||
600 | if ((gcc_l15_corrected_err_count_delta > 0) || is_gcc_l15_ecc_corrected_total_err_overflow) { | ||
601 | nvgpu_log(g, gpu_dbg_fn | gpu_dbg_intr, | ||
602 | "corrected error (SBE) detected in GCC L1.5! err_mask [%08x] is_overf [%d]", | ||
603 | gcc_l15_ecc_corrected_err_status, is_gcc_l15_ecc_corrected_total_err_overflow); | ||
604 | |||
605 | /* HW uses 16-bits counter */ | ||
606 | gcc_l15_corrected_err_count_delta += | ||
607 | (is_gcc_l15_ecc_corrected_total_err_overflow << | ||
608 | gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_s()); | ||
609 | g->gr.t19x.ecc_stats.gcc_l15_corrected_err_count.counters[gpc] += | ||
610 | gcc_l15_corrected_err_count_delta; | ||
611 | gk20a_writel(g, | ||
612 | gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + offset, | ||
613 | 0); | ||
614 | } | ||
615 | if ((gcc_l15_uncorrected_err_count_delta > 0) || is_gcc_l15_ecc_uncorrected_total_err_overflow) { | ||
616 | nvgpu_log(g, gpu_dbg_fn | gpu_dbg_intr, | ||
617 | "Uncorrected error (DBE) detected in GCC L1.5! err_mask [%08x] is_overf [%d]", | ||
618 | gcc_l15_ecc_uncorrected_err_status, is_gcc_l15_ecc_uncorrected_total_err_overflow); | ||
619 | |||
620 | /* HW uses 16-bits counter */ | ||
621 | gcc_l15_uncorrected_err_count_delta += | ||
622 | (is_gcc_l15_ecc_uncorrected_total_err_overflow << | ||
623 | gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_s()); | ||
624 | g->gr.t19x.ecc_stats.gcc_l15_uncorrected_err_count.counters[gpc] += | ||
625 | gcc_l15_uncorrected_err_count_delta; | ||
626 | gk20a_writel(g, | ||
627 | gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + offset, | ||
628 | 0); | ||
629 | } | ||
630 | |||
631 | gk20a_writel(g, gr_pri_gpc0_gcc_l15_ecc_status_r() + offset, | ||
632 | gr_pri_gpc0_gcc_l15_ecc_status_reset_task_f()); | ||
633 | |||
634 | return 0; | ||
635 | } | ||
636 | |||
559 | static void gr_gv11b_enable_gpc_exceptions(struct gk20a *g) | 637 | static void gr_gv11b_enable_gpc_exceptions(struct gk20a *g) |
560 | { | 638 | { |
561 | struct gr_gk20a *gr = &g->gr; | 639 | struct gr_gk20a *gr = &g->gr; |
@@ -567,7 +645,8 @@ static void gr_gv11b_enable_gpc_exceptions(struct gk20a *g) | |||
567 | tpc_mask = | 645 | tpc_mask = |
568 | gr_gpcs_gpccs_gpc_exception_en_tpc_f((1 << gr->tpc_count) - 1); | 646 | gr_gpcs_gpccs_gpc_exception_en_tpc_f((1 << gr->tpc_count) - 1); |
569 | 647 | ||
570 | gk20a_writel(g, gr_gpcs_gpccs_gpc_exception_en_r(), tpc_mask); | 648 | gk20a_writel(g, gr_gpcs_gpccs_gpc_exception_en_r(), |
649 | (tpc_mask | gr_gpcs_gpccs_gpc_exception_en_gcc_f(1))); | ||
571 | } | 650 | } |
572 | 651 | ||
573 | static int gr_gv11b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, | 652 | static int gr_gv11b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, |
@@ -2113,6 +2192,7 @@ void gv11b_init_gr(struct gpu_ops *gops) | |||
2113 | gops->gr.set_gpc_tpc_mask = gr_gv11b_set_gpc_tpc_mask; | 2192 | gops->gr.set_gpc_tpc_mask = gr_gv11b_set_gpc_tpc_mask; |
2114 | gops->gr.get_access_map = gr_gv11b_get_access_map; | 2193 | gops->gr.get_access_map = gr_gv11b_get_access_map; |
2115 | gops->gr.handle_sm_exception = gr_gv11b_handle_sm_exception; | 2194 | gops->gr.handle_sm_exception = gr_gv11b_handle_sm_exception; |
2195 | gops->gr.handle_gcc_exception = gr_gv11b_handle_gcc_exception; | ||
2116 | gops->gr.handle_tex_exception = gr_gv11b_handle_tex_exception; | 2196 | gops->gr.handle_tex_exception = gr_gv11b_handle_tex_exception; |
2117 | gops->gr.enable_gpc_exceptions = gr_gv11b_enable_gpc_exceptions; | 2197 | gops->gr.enable_gpc_exceptions = gr_gv11b_enable_gpc_exceptions; |
2118 | gops->gr.mask_hww_warp_esr = gv11b_mask_hww_warp_esr; | 2198 | gops->gr.mask_hww_warp_esr = gv11b_mask_hww_warp_esr; |