diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv100')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/fifo_gv100.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/fifo_gv100.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 2 |
3 files changed, 24 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.c b/drivers/gpu/nvgpu/gv100/fifo_gv100.c index 0b5515f2..e23bc77b 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.c +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 fifo | 2 | * GV100 fifo |
3 | * | 3 | * |
4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -55,3 +55,21 @@ void gv100_apply_ctxsw_timeout_intr(struct gk20a *g) | |||
55 | gk20a_writel(g, fifo_eng_timeout_r(), timeout); | 55 | gk20a_writel(g, fifo_eng_timeout_r(), timeout); |
56 | } | 56 | } |
57 | 57 | ||
58 | void gv100_fifo_teardown_mask_intr(struct gk20a *g) | ||
59 | { | ||
60 | u32 val; | ||
61 | |||
62 | val = gk20a_readl(g, fifo_intr_en_0_r()); | ||
63 | val &= ~(fifo_intr_en_0_sched_error_m()); | ||
64 | gk20a_writel(g, fifo_intr_en_0_r(), val); | ||
65 | gk20a_writel(g, fifo_intr_0_r(), fifo_intr_0_sched_error_reset_f()); | ||
66 | } | ||
67 | |||
68 | void gv100_fifo_teardown_unmask_intr(struct gk20a *g) | ||
69 | { | ||
70 | u32 val; | ||
71 | |||
72 | val = gk20a_readl(g, fifo_intr_en_0_r()); | ||
73 | val |= fifo_intr_en_0_sched_error_f(1); | ||
74 | gk20a_writel(g, fifo_intr_en_0_r(), val); | ||
75 | } | ||
diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.h b/drivers/gpu/nvgpu/gv100/fifo_gv100.h index 0af3fcce..e9a89766 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.h +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 Fifo | 2 | * GV100 Fifo |
3 | * | 3 | * |
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -31,4 +31,6 @@ struct gk20a; | |||
31 | u32 gv100_fifo_get_num_fifos(struct gk20a *g); | 31 | u32 gv100_fifo_get_num_fifos(struct gk20a *g); |
32 | u32 gv100_fifo_get_preempt_timeout(struct gk20a *g); | 32 | u32 gv100_fifo_get_preempt_timeout(struct gk20a *g); |
33 | void gv100_apply_ctxsw_timeout_intr(struct gk20a *g); | 33 | void gv100_apply_ctxsw_timeout_intr(struct gk20a *g); |
34 | void gv100_fifo_teardown_mask_intr(struct gk20a *g); | ||
35 | void gv100_fifo_teardown_unmask_intr(struct gk20a *g); | ||
34 | #endif | 36 | #endif |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 9621aaa4..c8849631 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -639,6 +639,8 @@ static const struct gpu_ops gv100_ops = { | |||
639 | .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, | 639 | .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, |
640 | .reset_enable_hw = gk20a_init_fifo_reset_enable_hw, | 640 | .reset_enable_hw = gk20a_init_fifo_reset_enable_hw, |
641 | .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, | 641 | .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, |
642 | .teardown_mask_intr = gv100_fifo_teardown_mask_intr, | ||
643 | .teardown_unmask_intr = gv100_fifo_teardown_unmask_intr, | ||
642 | .handle_sched_error = gk20a_fifo_handle_sched_error, | 644 | .handle_sched_error = gk20a_fifo_handle_sched_error, |
643 | .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, | 645 | .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, |
644 | .handle_pbdma_intr_1 = gv11b_fifo_handle_pbdma_intr_1, | 646 | .handle_pbdma_intr_1 = gv11b_fifo_handle_pbdma_intr_1, |