diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv100')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mc_gv100.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mc_gv100.h | 3 |
2 files changed, 10 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.c b/drivers/gpu/nvgpu/gv100/mc_gv100.c index 7ed9e6da..2d84a3a8 100644 --- a/drivers/gpu/nvgpu/gv100/mc_gv100.c +++ b/drivers/gpu/nvgpu/gv100/mc_gv100.c | |||
@@ -72,15 +72,14 @@ bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0) | |||
72 | return (((mc_intr_0 & mc_intr_nvlink_pending_f()) != 0U) ? true : false); | 72 | return (((mc_intr_0 & mc_intr_nvlink_pending_f()) != 0U) ? true : false); |
73 | } | 73 | } |
74 | 74 | ||
75 | bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id) | 75 | bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, |
76 | u32 *eng_intr_pending) | ||
76 | { | 77 | { |
77 | u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0)); | 78 | u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0)); |
78 | u32 stall_intr, eng_intr_mask; | 79 | u32 stall_intr, eng_intr_mask; |
79 | 80 | ||
80 | eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id); | 81 | eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id); |
81 | if ((mc_intr_0 & eng_intr_mask) != 0U) { | 82 | *eng_intr_pending = mc_intr_0 & eng_intr_mask; |
82 | return true; | ||
83 | } | ||
84 | 83 | ||
85 | stall_intr = mc_intr_pfifo_pending_f() | | 84 | stall_intr = mc_intr_pfifo_pending_f() | |
86 | mc_intr_hub_pending_f() | | 85 | mc_intr_hub_pending_f() | |
@@ -88,9 +87,10 @@ bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id) | |||
88 | mc_intr_pbus_pending_f() | | 87 | mc_intr_pbus_pending_f() | |
89 | mc_intr_ltc_pending_f() | | 88 | mc_intr_ltc_pending_f() | |
90 | mc_intr_nvlink_pending_f(); | 89 | mc_intr_nvlink_pending_f(); |
91 | if ((mc_intr_0 & stall_intr) != 0U) { | ||
92 | return true; | ||
93 | } | ||
94 | 90 | ||
95 | return false; | 91 | nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr, |
92 | "mc_intr_0 = 0x%08x, eng_intr = 0x%08x", | ||
93 | mc_intr_0 & stall_intr, *eng_intr_pending); | ||
94 | |||
95 | return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U; | ||
96 | } | 96 | } |
diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.h b/drivers/gpu/nvgpu/gv100/mc_gv100.h index 4aff4a36..e9069258 100644 --- a/drivers/gpu/nvgpu/gv100/mc_gv100.h +++ b/drivers/gpu/nvgpu/gv100/mc_gv100.h | |||
@@ -26,5 +26,6 @@ struct gk20a; | |||
26 | 26 | ||
27 | void mc_gv100_intr_enable(struct gk20a *g); | 27 | void mc_gv100_intr_enable(struct gk20a *g); |
28 | bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0); | 28 | bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0); |
29 | bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id); | 29 | bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, |
30 | u32 *eng_intr_pending); | ||
30 | #endif | 31 | #endif |