1 files changed, 7 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gv100/regops_gv100.h b/drivers/gpu/nvgpu/gv100/regops_gv100.h
index 06e5b8e1..4abfeaac 100644
--- a/drivers/gpu/nvgpu/gv100/regops_gv100.h
+++ b/drivers/gpu/nvgpu/gv100/regops_gv100.h
@@ -2,7 +2,7 @@
  *
  * Tegra GV100 GPU Driver Register Ops
  *
- * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,17 +26,17 @@
 #define __REGOPS_GV100_H_
 
 const struct regop_offset_range *gv100_get_global_whitelist_ranges(void);
-int gv100_get_global_whitelist_ranges_count(void);
+u64 gv100_get_global_whitelist_ranges_count(void);
 const struct regop_offset_range *gv100_get_context_whitelist_ranges(void);
-int gv100_get_context_whitelist_ranges_count(void);
+u64 gv100_get_context_whitelist_ranges_count(void);
 const u32 *gv100_get_runcontrol_whitelist(void);
-int gv100_get_runcontrol_whitelist_count(void);
+u64 gv100_get_runcontrol_whitelist_count(void);
 const struct regop_offset_range *gv100_get_runcontrol_whitelist_ranges(void);
-int gv100_get_runcontrol_whitelist_ranges_count(void);
+u64 gv100_get_runcontrol_whitelist_ranges_count(void);
 const u32 *gv100_get_qctl_whitelist(void);
-int gv100_get_qctl_whitelist_count(void);
+u64 gv100_get_qctl_whitelist_count(void);
 const struct regop_offset_range *gv100_get_qctl_whitelist_ranges(void);
-int gv100_get_qctl_whitelist_ranges_count(void);
+u64 gv100_get_qctl_whitelist_ranges_count(void);
 int gv100_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
 
 #endif /* __REGOPS_GV11B_H_ */