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path: root/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gv100/nvlink_gv100.c')
-rw-r--r--drivers/gpu/nvgpu/gv100/nvlink_gv100.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
index ef1343d8..b945b902 100644
--- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
@@ -45,7 +45,6 @@
45#include <nvgpu/hw/gv100/hw_trim_gv100.h> 45#include <nvgpu/hw/gv100/hw_trim_gv100.h>
46#include <nvgpu/hw/gv100/hw_nvtlc_gv100.h> 46#include <nvgpu/hw/gv100/hw_nvtlc_gv100.h>
47 47
48#include <nvgpu/hw/gv100/hw_fb_gv100.h>
49#include <nvgpu/hw/gv100/hw_mc_gv100.h> 48#include <nvgpu/hw/gv100/hw_mc_gv100.h>
50 49
51#define NVLINK_PLL_ON_TIMEOUT_MS 30 50#define NVLINK_PLL_ON_TIMEOUT_MS 30
@@ -1367,12 +1366,6 @@ static void gv100_nvlink_common_intr_enable(struct gk20a *g,
1367{ 1366{
1368 u32 reg, i; 1367 u32 reg, i;
1369 1368
1370 /* Init HS HUB SW state */
1371 g->nvlink.hshub_config0 = gk20a_readl(g, fb_hshub_config0_r());
1372 g->nvlink.hshub_config1 = gk20a_readl(g, fb_hshub_config1_r());
1373 g->nvlink.hshub_config2 = gk20a_readl(g, fb_hshub_config2_r());
1374 g->nvlink.hshub_config6 = gk20a_readl(g, fb_hshub_config6_r());
1375
1376 /* Init IOCTRL */ 1369 /* Init IOCTRL */
1377 for_each_set_bit(i, &mask, 32) { 1370 for_each_set_bit(i, &mask, 32) {
1378 reg = IOCTRL_REG_RD32(g, ioctrl_link_intr_0_mask_r(i)); 1371 reg = IOCTRL_REG_RD32(g, ioctrl_link_intr_0_mask_r(i));