summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/nvlink_gv100.c')
-rw-r--r--drivers/gpu/nvgpu/gv100/nvlink_gv100.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
index cae4f9bd..e85b5a93 100644
--- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
@@ -2696,6 +2696,13 @@ u32 gv100_nvlink_link_get_rx_sublink_state(struct gk20a *g, u32 link_id)
2696 return nvl_sl1_slsm_status_rx_primary_state_v(reg); 2696 return nvl_sl1_slsm_status_rx_primary_state_v(reg);
2697} 2697}
2698 2698
2699/* Hardcode the link_mask while we wait for VBIOS link_disable_mask field
2700 * to be updated.
2701 */
2702void gv100_nvlink_get_connected_link_mask(u32 *link_mask)
2703{
2704 *link_mask = GV100_CONNECTED_LINK_MASK;
2705}
2699/* 2706/*
2700 * Performs nvlink device level initialization by discovering the topology 2707 * Performs nvlink device level initialization by discovering the topology
2701 * taking device out of reset, boot minion, set clocks up and common interrupts 2708 * taking device out of reset, boot minion, set clocks up and common interrupts
@@ -2735,10 +2742,20 @@ int gv100_nvlink_early_init(struct gk20a *g)
2735 /* Links in reset should be removed from initialized link sw state */ 2742 /* Links in reset should be removed from initialized link sw state */
2736 g->nvlink.initialized_links &= __gv100_nvlink_get_link_reset_mask(g); 2743 g->nvlink.initialized_links &= __gv100_nvlink_get_link_reset_mask(g);
2737 2744
2738 nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x (from DT)", 2745 /* VBIOS link_disable_mask should be sufficient to find the connected
2739 g->nvlink.connected_links); 2746 * links. As VBIOS is not updated with correct mask, we parse the DT
2747 * node where we hardcode the link_id. DT method is not scalable as same
2748 * DT node is used for different dGPUs connected over PCIE.
2749 * Remove the DT parsing of link id and use HAL to get link_mask based
2750 * on the GPU. This is temporary WAR while we get the VBIOS updated with
2751 * correct mask.
2752 */
2753 g->ops.nvlink.get_connected_link_mask(&(g->nvlink.connected_links));
2754
2755 nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x",
2756 g->nvlink.connected_links);
2740 2757
2741 /* Track unconnected links */ 2758 /* Track only connected links */
2742 g->nvlink.discovered_links &= g->nvlink.connected_links; 2759 g->nvlink.discovered_links &= g->nvlink.connected_links;
2743 2760
2744 nvgpu_log(g, gpu_dbg_nvlink, "discovered_links = 0x%08x (combination)", 2761 nvgpu_log(g, gpu_dbg_nvlink, "discovered_links = 0x%08x (combination)",