diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv100/fb_gv100.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/fb_gv100.c | 52 |
1 files changed, 51 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv100/fb_gv100.c b/drivers/gpu/nvgpu/gv100/fb_gv100.c index 0a2939bf..84a8d64a 100644 --- a/drivers/gpu/nvgpu/gv100/fb_gv100.c +++ b/drivers/gpu/nvgpu/gv100/fb_gv100.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 FB | 2 | * GV100 FB |
3 | * | 3 | * |
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -182,3 +182,53 @@ exit: | |||
182 | 182 | ||
183 | return err; | 183 | return err; |
184 | } | 184 | } |
185 | |||
186 | int gv100_fb_init_nvlink(struct gk20a *g) | ||
187 | { | ||
188 | u32 data; | ||
189 | u32 mask = g->nvlink.enabled_links; | ||
190 | |||
191 | /* Map enabled link to SYSMEM */ | ||
192 | data = nvgpu_readl(g, fb_hshub_config0_r()); | ||
193 | data = set_field(data, fb_hshub_config0_sysmem_nvlink_mask_m(), | ||
194 | fb_hshub_config0_sysmem_nvlink_mask_f(mask)); | ||
195 | nvgpu_writel(g, fb_hshub_config0_r(), data); | ||
196 | |||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | int gv100_fb_enable_nvlink(struct gk20a *g) | ||
201 | { | ||
202 | u32 data; | ||
203 | |||
204 | nvgpu_log(g, gpu_dbg_nvlink|gpu_dbg_info, "enabling nvlink"); | ||
205 | |||
206 | /* Enable nvlink for NISO FBHUB */ | ||
207 | data = nvgpu_readl(g, fb_niso_cfg1_r()); | ||
208 | data = set_field(data, fb_niso_cfg1_sysmem_nvlink_m(), | ||
209 | fb_niso_cfg1_sysmem_nvlink_enabled_f()); | ||
210 | nvgpu_writel(g, fb_niso_cfg1_r(), data); | ||
211 | |||
212 | /* Setup atomics */ | ||
213 | data = nvgpu_readl(g, fb_mmu_ctrl_r()); | ||
214 | data = set_field(data, fb_mmu_ctrl_atomic_capability_mode_m(), | ||
215 | fb_mmu_ctrl_atomic_capability_mode_rmw_f()); | ||
216 | nvgpu_writel(g, fb_mmu_ctrl_r(), data); | ||
217 | |||
218 | data = nvgpu_readl(g, fb_hsmmu_pri_mmu_ctrl_r()); | ||
219 | data = set_field(data, fb_hsmmu_pri_mmu_ctrl_atomic_capability_mode_m(), | ||
220 | fb_hsmmu_pri_mmu_ctrl_atomic_capability_mode_rmw_f()); | ||
221 | nvgpu_writel(g, fb_hsmmu_pri_mmu_ctrl_r(), data); | ||
222 | |||
223 | data = nvgpu_readl(g, fb_fbhub_num_active_ltcs_r()); | ||
224 | data = set_field(data, fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(), | ||
225 | fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f()); | ||
226 | nvgpu_writel(g, fb_fbhub_num_active_ltcs_r(), data); | ||
227 | |||
228 | data = nvgpu_readl(g, fb_hshub_num_active_ltcs_r()); | ||
229 | data = set_field(data, fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(), | ||
230 | fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f()); | ||
231 | nvgpu_writel(g, fb_hshub_num_active_ltcs_r(), data); | ||
232 | |||
233 | return 0; | ||
234 | } | ||