diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 31 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.h | 19 |
3 files changed, 27 insertions, 53 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index a70565c3..b0871155 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include "gk20a/fifo_gk20a.h" | 17 | #include "gk20a/fifo_gk20a.h" |
18 | #include "gk20a/ctxsw_trace_gk20a.h" | 18 | #include "gk20a/ctxsw_trace_gk20a.h" |
19 | #include "gk20a/fecs_trace_gk20a.h" | 19 | #include "gk20a/fecs_trace_gk20a.h" |
20 | #include "gk20a/mm_gk20a.h" | ||
21 | #include "gk20a/dbg_gpu_gk20a.h" | 20 | #include "gk20a/dbg_gpu_gk20a.h" |
22 | #include "gk20a/css_gr_gk20a.h" | 21 | #include "gk20a/css_gr_gk20a.h" |
23 | #include "gk20a/bus_gk20a.h" | 22 | #include "gk20a/bus_gk20a.h" |
@@ -48,14 +47,12 @@ | |||
48 | #include "gm20b/fifo_gm20b.h" | 47 | #include "gm20b/fifo_gm20b.h" |
49 | #include "gm20b/pmu_gm20b.h" | 48 | #include "gm20b/pmu_gm20b.h" |
50 | #include "gm20b/clk_gm20b.h" | 49 | #include "gm20b/clk_gm20b.h" |
50 | #include "gm20b/fifo_gm20b.h" | ||
51 | #include "gm20b/fb_gm20b.h" | 51 | #include "gm20b/fb_gm20b.h" |
52 | #include "gm20b/mm_gm20b.h" | ||
53 | 52 | ||
54 | #include "gp10b.h" | 53 | #include "gp10b.h" |
55 | #include "hal_gp10b.h" | 54 | #include "hal_gp10b.h" |
56 | 55 | ||
57 | #include "common/linux/platform_gk20a_tegra.h" | ||
58 | |||
59 | #include <nvgpu/debug.h> | 56 | #include <nvgpu/debug.h> |
60 | #include <nvgpu/bug.h> | 57 | #include <nvgpu/bug.h> |
61 | #include <nvgpu/enabled.h> | 58 | #include <nvgpu/enabled.h> |
@@ -322,30 +319,6 @@ static const struct gpu_ops gp10b_ops = { | |||
322 | .max_entries = gk20a_gr_max_entries, | 319 | .max_entries = gk20a_gr_max_entries, |
323 | }, | 320 | }, |
324 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 321 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
325 | .mm = { | ||
326 | .support_sparse = gm20b_mm_support_sparse, | ||
327 | .gmmu_map = gk20a_locked_gmmu_map, | ||
328 | .gmmu_unmap = gk20a_locked_gmmu_unmap, | ||
329 | .vm_bind_channel = gk20a_vm_bind_channel, | ||
330 | .fb_flush = gk20a_mm_fb_flush, | ||
331 | .l2_invalidate = gk20a_mm_l2_invalidate, | ||
332 | .l2_flush = gk20a_mm_l2_flush, | ||
333 | .cbc_clean = gk20a_mm_cbc_clean, | ||
334 | .set_big_page_size = gm20b_mm_set_big_page_size, | ||
335 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, | ||
336 | .get_default_big_page_size = gp10b_mm_get_default_big_page_size, | ||
337 | .gpu_phys_addr = gm20b_gpu_phys_addr, | ||
338 | .get_physical_addr_bits = gp10b_mm_get_physical_addr_bits, | ||
339 | .get_mmu_levels = gp10b_mm_get_mmu_levels, | ||
340 | .init_pdb = gp10b_mm_init_pdb, | ||
341 | .init_mm_setup_hw = gp10b_init_mm_setup_hw, | ||
342 | .is_bar1_supported = gm20b_mm_is_bar1_supported, | ||
343 | .init_inst_block = gk20a_init_inst_block, | ||
344 | .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, | ||
345 | .init_bar2_vm = gb10b_init_bar2_vm, | ||
346 | .init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup, | ||
347 | .remove_bar2_vm = gp10b_remove_bar2_vm, | ||
348 | }, | ||
349 | .pramin = { | 322 | .pramin = { |
350 | .enter = gk20a_pramin_enter, | 323 | .enter = gk20a_pramin_enter, |
351 | .exit = gk20a_pramin_exit, | 324 | .exit = gk20a_pramin_exit, |
@@ -454,7 +427,6 @@ int gp10b_init_hal(struct gk20a *g) | |||
454 | gops->fifo = gp10b_ops.fifo; | 427 | gops->fifo = gp10b_ops.fifo; |
455 | gops->gr_ctx = gp10b_ops.gr_ctx; | 428 | gops->gr_ctx = gp10b_ops.gr_ctx; |
456 | gops->fecs_trace = gp10b_ops.fecs_trace; | 429 | gops->fecs_trace = gp10b_ops.fecs_trace; |
457 | gops->mm = gp10b_ops.mm; | ||
458 | gops->pramin = gp10b_ops.pramin; | 430 | gops->pramin = gp10b_ops.pramin; |
459 | gops->therm = gp10b_ops.therm; | 431 | gops->therm = gp10b_ops.therm; |
460 | gops->regops = gp10b_ops.regops; | 432 | gops->regops = gp10b_ops.regops; |
@@ -517,6 +489,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
517 | 489 | ||
518 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | 490 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; |
519 | gp10b_init_gr(g); | 491 | gp10b_init_gr(g); |
492 | gp10b_init_mm(gops); | ||
520 | gp10b_init_pmu_ops(g); | 493 | gp10b_init_pmu_ops(g); |
521 | 494 | ||
522 | gp10b_init_uncompressed_kind_map(); | 495 | gp10b_init_uncompressed_kind_map(); |
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index 5c17244d..729ccc39 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -27,17 +27,17 @@ | |||
27 | #include <nvgpu/hw/gp10b/hw_bus_gp10b.h> | 27 | #include <nvgpu/hw/gp10b/hw_bus_gp10b.h> |
28 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> | 28 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> |
29 | 29 | ||
30 | u32 gp10b_mm_get_default_big_page_size(void) | 30 | static u32 gp10b_mm_get_default_big_page_size(void) |
31 | { | 31 | { |
32 | return SZ_64K; | 32 | return SZ_64K; |
33 | } | 33 | } |
34 | 34 | ||
35 | u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g) | 35 | static u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g) |
36 | { | 36 | { |
37 | return 36; | 37 | return 36; |
38 | } | 38 | } |
39 | 39 | ||
40 | int gp10b_init_mm_setup_hw(struct gk20a *g) | 40 | static int gp10b_init_mm_setup_hw(struct gk20a *g) |
41 | { | 41 | { |
42 | struct mm_gk20a *mm = &g->mm; | 42 | struct mm_gk20a *mm = &g->mm; |
43 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; | 43 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; |
@@ -68,7 +68,7 @@ int gp10b_init_mm_setup_hw(struct gk20a *g) | |||
68 | 68 | ||
69 | } | 69 | } |
70 | 70 | ||
71 | int gb10b_init_bar2_vm(struct gk20a *g) | 71 | static int gb10b_init_bar2_vm(struct gk20a *g) |
72 | { | 72 | { |
73 | int err; | 73 | int err; |
74 | struct mm_gk20a *mm = &g->mm; | 74 | struct mm_gk20a *mm = &g->mm; |
@@ -99,7 +99,7 @@ clean_up_va: | |||
99 | return err; | 99 | return err; |
100 | } | 100 | } |
101 | 101 | ||
102 | int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) | 102 | static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) |
103 | { | 103 | { |
104 | struct mm_gk20a *mm = &g->mm; | 104 | struct mm_gk20a *mm = &g->mm; |
105 | struct nvgpu_mem *inst_block = &mm->bar2.inst_block; | 105 | struct nvgpu_mem *inst_block = &mm->bar2.inst_block; |
@@ -333,13 +333,13 @@ static const struct gk20a_mmu_level gp10b_mm_levels[] = { | |||
333 | {.update_entry = NULL} | 333 | {.update_entry = NULL} |
334 | }; | 334 | }; |
335 | 335 | ||
336 | const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, | 336 | static const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, |
337 | u32 big_page_size) | 337 | u32 big_page_size) |
338 | { | 338 | { |
339 | return gp10b_mm_levels; | 339 | return gp10b_mm_levels; |
340 | } | 340 | } |
341 | 341 | ||
342 | void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | 342 | static void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, |
343 | struct vm_gk20a *vm) | 343 | struct vm_gk20a *vm) |
344 | { | 344 | { |
345 | u64 pdb_addr = nvgpu_mem_get_addr(g, vm->pdb.mem); | 345 | u64 pdb_addr = nvgpu_mem_get_addr(g, vm->pdb.mem); |
@@ -360,7 +360,7 @@ void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | |||
360 | ram_in_page_dir_base_hi_f(pdb_addr_hi)); | 360 | ram_in_page_dir_base_hi_f(pdb_addr_hi)); |
361 | } | 361 | } |
362 | 362 | ||
363 | void gp10b_remove_bar2_vm(struct gk20a *g) | 363 | static void gp10b_remove_bar2_vm(struct gk20a *g) |
364 | { | 364 | { |
365 | struct mm_gk20a *mm = &g->mm; | 365 | struct mm_gk20a *mm = &g->mm; |
366 | 366 | ||
@@ -368,3 +368,17 @@ void gp10b_remove_bar2_vm(struct gk20a *g) | |||
368 | gk20a_free_inst_block(g, &mm->bar2.inst_block); | 368 | gk20a_free_inst_block(g, &mm->bar2.inst_block); |
369 | nvgpu_vm_put(mm->bar2.vm); | 369 | nvgpu_vm_put(mm->bar2.vm); |
370 | } | 370 | } |
371 | |||
372 | |||
373 | void gp10b_init_mm(struct gpu_ops *gops) | ||
374 | { | ||
375 | gm20b_init_mm(gops); | ||
376 | gops->mm.get_default_big_page_size = gp10b_mm_get_default_big_page_size; | ||
377 | gops->mm.get_physical_addr_bits = gp10b_mm_get_physical_addr_bits; | ||
378 | gops->mm.init_mm_setup_hw = gp10b_init_mm_setup_hw; | ||
379 | gops->mm.init_bar2_vm = gb10b_init_bar2_vm; | ||
380 | gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup; | ||
381 | gops->mm.get_mmu_levels = gp10b_mm_get_mmu_levels; | ||
382 | gops->mm.init_pdb = gp10b_mm_init_pdb; | ||
383 | gops->mm.remove_bar2_vm = gp10b_remove_bar2_vm; | ||
384 | } | ||
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h index a0b9acd6..4cc71ea6 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -14,20 +14,7 @@ | |||
14 | #ifndef MM_GP10B_H | 14 | #ifndef MM_GP10B_H |
15 | #define MM_GP10B_H | 15 | #define MM_GP10B_H |
16 | 16 | ||
17 | struct gk20a; | 17 | struct gpu_ops; |
18 | struct gk20a_mmu_level; | ||
19 | struct nvgpu_mem; | ||
20 | struct vm_gk20a; | ||
21 | |||
22 | u32 gp10b_mm_get_default_big_page_size(void); | ||
23 | u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g); | ||
24 | int gp10b_init_mm_setup_hw(struct gk20a *g); | ||
25 | int gb10b_init_bar2_vm(struct gk20a *g); | ||
26 | int gb10b_init_bar2_mm_hw_setup(struct gk20a *g); | ||
27 | const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, | ||
28 | u32 big_page_size); | ||
29 | void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | ||
30 | struct vm_gk20a *vm); | ||
31 | void gp10b_remove_bar2_vm(struct gk20a *g); | ||
32 | 18 | ||
19 | void gp10b_init_mm(struct gpu_ops *gops); | ||
33 | #endif | 20 | #endif |