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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c21
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.h2
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c2
3 files changed, 1 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index ca2bc52b..56acc732 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1167,27 +1167,6 @@ void gr_gp10b_dump_ctxsw_stats(struct gk20a *g, struct vm_gk20a *vm,
1167 nvgpu_mem_end(g, mem); 1167 nvgpu_mem_end(g, mem);
1168} 1168}
1169 1169
1170void gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
1171 struct gr_ctx_desc *gr_ctx)
1172{
1173 gk20a_dbg_fn("");
1174
1175 if (!gr_ctx)
1176 return;
1177
1178 if (g->ops.gr.dump_ctxsw_stats &&
1179 g->gr.ctx_vars.dump_ctxsw_stats_on_channel_close)
1180 g->ops.gr.dump_ctxsw_stats(g, vm, gr_ctx);
1181
1182 nvgpu_dma_unmap_free(vm, &gr_ctx->pagepool_ctxsw_buffer);
1183 nvgpu_dma_unmap_free(vm, &gr_ctx->betacb_ctxsw_buffer);
1184 nvgpu_dma_unmap_free(vm, &gr_ctx->spill_ctxsw_buffer);
1185 nvgpu_dma_unmap_free(vm, &gr_ctx->preempt_ctxsw_buffer);
1186 gr_gk20a_free_gr_ctx(g, vm, gr_ctx);
1187 gk20a_dbg_fn("done");
1188}
1189
1190
1191void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, 1170void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g,
1192 struct channel_ctx_gk20a *ch_ctx, 1171 struct channel_ctx_gk20a *ch_ctx,
1193 struct nvgpu_mem *mem) 1172 struct nvgpu_mem *mem)
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
index 64a076ef..e3ef6304 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -101,8 +101,6 @@ int gr_gp10b_alloc_gr_ctx(struct gk20a *g,
101 struct gr_ctx_desc **gr_ctx, struct vm_gk20a *vm, 101 struct gr_ctx_desc **gr_ctx, struct vm_gk20a *vm,
102 u32 class, 102 u32 class,
103 u32 flags); 103 u32 flags);
104void gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
105 struct gr_ctx_desc *gr_ctx);
106void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, 104void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g,
107 struct channel_ctx_gk20a *ch_ctx, 105 struct channel_ctx_gk20a *ch_ctx,
108 struct nvgpu_mem *mem); 106 struct nvgpu_mem *mem);
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 7ca9e313..aaee595d 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -256,7 +256,7 @@ static const struct gpu_ops gp10b_ops = {
256 .pagepool_default_size = gr_gp10b_pagepool_default_size, 256 .pagepool_default_size = gr_gp10b_pagepool_default_size,
257 .init_ctx_state = gr_gp10b_init_ctx_state, 257 .init_ctx_state = gr_gp10b_init_ctx_state,
258 .alloc_gr_ctx = gr_gp10b_alloc_gr_ctx, 258 .alloc_gr_ctx = gr_gp10b_alloc_gr_ctx,
259 .free_gr_ctx = gr_gp10b_free_gr_ctx, 259 .free_gr_ctx = gr_gk20a_free_gr_ctx,
260 .update_ctxsw_preemption_mode = 260 .update_ctxsw_preemption_mode =
261 gr_gp10b_update_ctxsw_preemption_mode, 261 gr_gp10b_update_ctxsw_preemption_mode,
262 .dump_gr_regs = gr_gp10b_dump_gr_status_regs, 262 .dump_gr_regs = gr_gp10b_dump_gr_status_regs,