diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mc_gp10b.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c index dfcbe398..abbd2191 100644 --- a/drivers/gpu/nvgpu/gp10b/mc_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mc_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP20B master | 2 | * GP20B master |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -133,12 +133,6 @@ irqreturn_t mc_gp10b_intr_thread_stall(struct gk20a *g) | |||
133 | 133 | ||
134 | gk20a_dbg(gpu_dbg_intr, "stall intr %08x\n", mc_intr_0); | 134 | gk20a_dbg(gpu_dbg_intr, "stall intr %08x\n", mc_intr_0); |
135 | 135 | ||
136 | /* handle critical interrupts first */ | ||
137 | if (mc_intr_0 & mc_intr_pbus_pending_f()) | ||
138 | gk20a_pbus_isr(g); | ||
139 | if (mc_intr_0 & mc_intr_priv_ring_pending_f()) | ||
140 | gk20a_priv_ring_isr(g); | ||
141 | |||
142 | for (engine_id_idx = 0; engine_id_idx < g->fifo.num_engines; engine_id_idx++) { | 136 | for (engine_id_idx = 0; engine_id_idx < g->fifo.num_engines; engine_id_idx++) { |
143 | active_engine_id = g->fifo.active_engines_list[engine_id_idx]; | 137 | active_engine_id = g->fifo.active_engines_list[engine_id_idx]; |
144 | 138 | ||
@@ -163,8 +157,12 @@ irqreturn_t mc_gp10b_intr_thread_stall(struct gk20a *g) | |||
163 | gk20a_fifo_isr(g); | 157 | gk20a_fifo_isr(g); |
164 | if (mc_intr_0 & mc_intr_pmu_pending_f()) | 158 | if (mc_intr_0 & mc_intr_pmu_pending_f()) |
165 | gk20a_pmu_isr(g); | 159 | gk20a_pmu_isr(g); |
160 | if (mc_intr_0 & mc_intr_priv_ring_pending_f()) | ||
161 | gk20a_priv_ring_isr(g); | ||
166 | if (mc_intr_0 & mc_intr_ltc_pending_f()) | 162 | if (mc_intr_0 & mc_intr_ltc_pending_f()) |
167 | g->ops.ltc.isr(g); | 163 | g->ops.ltc.isr(g); |
164 | if (mc_intr_0 & mc_intr_pbus_pending_f()) | ||
165 | gk20a_pbus_isr(g); | ||
168 | 166 | ||
169 | /* sync handled irq counter before re-enabling interrupts */ | 167 | /* sync handled irq counter before re-enabling interrupts */ |
170 | atomic_set(&g->sw_irq_stall_last_handled, hw_irq_count); | 168 | atomic_set(&g->sw_irq_stall_last_handled, hw_irq_count); |