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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c7
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.h1
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c1
3 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 060cc9fb..813b8891 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -2361,8 +2361,6 @@ int gr_gp10b_init_preemption_state(struct gk20a *g)
2361 gr_debug_2_gfxp_wfi_always_injects_wfi_enabled_f()); 2361 gr_debug_2_gfxp_wfi_always_injects_wfi_enabled_f());
2362 gk20a_writel(g, gr_debug_2_r(), debug_2); 2362 gk20a_writel(g, gr_debug_2_r(), debug_2);
2363 2363
2364 g->gr.czf_bypass = gr_gpc0_prop_debug1_czf_bypass_init_v();
2365
2366 return 0; 2364 return 0;
2367} 2365}
2368 2366
@@ -2376,6 +2374,11 @@ void gr_gp10b_set_preemption_buffer_va(struct gk20a *g,
2376 2374
2377} 2375}
2378 2376
2377void gr_gp10b_init_czf_bypass(struct gk20a *g)
2378{
2379 g->gr.czf_bypass = gr_gpc0_prop_debug1_czf_bypass_init_v();
2380}
2381
2379int gr_gp10b_set_czf_bypass(struct gk20a *g, struct channel_gk20a *ch) 2382int gr_gp10b_set_czf_bypass(struct gk20a *g, struct channel_gk20a *ch)
2380{ 2383{
2381 struct nvgpu_dbg_gpu_reg_op ops; 2384 struct nvgpu_dbg_gpu_reg_op ops;
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
index 6ae4789a..9ddc0375 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -143,6 +143,7 @@ int gr_gp10b_init_preemption_state(struct gk20a *g);
143void gr_gp10b_set_preemption_buffer_va(struct gk20a *g, 143void gr_gp10b_set_preemption_buffer_va(struct gk20a *g,
144 struct nvgpu_mem *mem, u64 gpu_va); 144 struct nvgpu_mem *mem, u64 gpu_va);
145int gr_gp10b_set_czf_bypass(struct gk20a *g, struct channel_gk20a *ch); 145int gr_gp10b_set_czf_bypass(struct gk20a *g, struct channel_gk20a *ch);
146void gr_gp10b_init_czf_bypass(struct gk20a *g);
146void gr_gp10b_init_ctxsw_hdr_data(struct gk20a *g, struct nvgpu_mem *mem); 147void gr_gp10b_init_ctxsw_hdr_data(struct gk20a *g, struct nvgpu_mem *mem);
147 148
148struct gr_t18x { 149struct gr_t18x {
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index a10df740..98e143f0 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -303,6 +303,7 @@ static const struct gpu_ops gp10b_ops = {
303 .set_boosted_ctx = gr_gp10b_set_boosted_ctx, 303 .set_boosted_ctx = gr_gp10b_set_boosted_ctx,
304 .set_preemption_mode = gr_gp10b_set_preemption_mode, 304 .set_preemption_mode = gr_gp10b_set_preemption_mode,
305 .set_czf_bypass = gr_gp10b_set_czf_bypass, 305 .set_czf_bypass = gr_gp10b_set_czf_bypass,
306 .init_czf_bypass = gr_gp10b_init_czf_bypass,
306 .pre_process_sm_exception = gr_gp10b_pre_process_sm_exception, 307 .pre_process_sm_exception = gr_gp10b_pre_process_sm_exception,
307 .set_preemption_buffer_va = gr_gp10b_set_preemption_buffer_va, 308 .set_preemption_buffer_va = gr_gp10b_set_preemption_buffer_va,
308 .init_preemption_state = gr_gp10b_init_preemption_state, 309 .init_preemption_state = gr_gp10b_init_preemption_state,