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-rw-r--r--drivers/gpu/nvgpu/gp10b/cde_gp10b.c15
-rw-r--r--drivers/gpu/nvgpu/gp10b/cde_gp10b.h15
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c7
3 files changed, 22 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/cde_gp10b.c b/drivers/gpu/nvgpu/gp10b/cde_gp10b.c
index 1af5b01c..685ddbc4 100644
--- a/drivers/gpu/nvgpu/gp10b/cde_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/cde_gp10b.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B CDE 2 * GP10B CDE
3 * 3 *
4 * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -30,7 +30,7 @@ enum gp10b_programs {
30 GP10B_PROG_PASSTHROUGH = 8, 30 GP10B_PROG_PASSTHROUGH = 8,
31}; 31};
32 32
33static void gp10b_cde_get_program_numbers(struct gk20a *g, 33void gp10b_cde_get_program_numbers(struct gk20a *g,
34 u32 block_height_log2, 34 u32 block_height_log2,
35 int *hprog_out, int *vprog_out) 35 int *hprog_out, int *vprog_out)
36{ 36{
@@ -60,7 +60,7 @@ static void gp10b_cde_get_program_numbers(struct gk20a *g,
60 *vprog_out = vprog; 60 *vprog_out = vprog;
61} 61}
62 62
63static bool gp10b_need_scatter_buffer(struct gk20a *g) 63bool gp10b_need_scatter_buffer(struct gk20a *g)
64{ 64{
65 return g->mm.bypass_smmu; 65 return g->mm.bypass_smmu;
66} 66}
@@ -74,7 +74,7 @@ static u8 parity(u32 a)
74 return (0x6996u >> a) & 1u; 74 return (0x6996u >> a) & 1u;
75} 75}
76 76
77static int gp10b_populate_scatter_buffer(struct gk20a *g, 77int gp10b_populate_scatter_buffer(struct gk20a *g,
78 struct sg_table *sgt, 78 struct sg_table *sgt,
79 size_t surface_size, 79 size_t surface_size,
80 void *scatter_buffer_ptr, 80 void *scatter_buffer_ptr,
@@ -140,10 +140,3 @@ static int gp10b_populate_scatter_buffer(struct gk20a *g,
140 140
141 return 0; 141 return 0;
142} 142}
143
144void gp10b_init_cde_ops(struct gpu_ops *gops)
145{
146 gops->cde.get_program_numbers = gp10b_cde_get_program_numbers;
147 gops->cde.need_scatter_buffer = gp10b_need_scatter_buffer;
148 gops->cde.populate_scatter_buffer = gp10b_populate_scatter_buffer;
149}
diff --git a/drivers/gpu/nvgpu/gp10b/cde_gp10b.h b/drivers/gpu/nvgpu/gp10b/cde_gp10b.h
index 52f785f1..3ee6027c 100644
--- a/drivers/gpu/nvgpu/gp10b/cde_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/cde_gp10b.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B CDE 2 * GP10B CDE
3 * 3 *
4 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -16,8 +16,17 @@
16#ifndef _NVHOST_GP10B_CDE 16#ifndef _NVHOST_GP10B_CDE
17#define _NVHOST_GP10B_CDE 17#define _NVHOST_GP10B_CDE
18 18
19struct gpu_ops; 19struct gk20a;
20struct sg_table;
20 21
21void gp10b_init_cde_ops(struct gpu_ops *gops); 22void gp10b_cde_get_program_numbers(struct gk20a *g,
23 u32 block_height_log2,
24 int *hprog_out, int *vprog_out);
25bool gp10b_need_scatter_buffer(struct gk20a *g);
26int gp10b_populate_scatter_buffer(struct gk20a *g,
27 struct sg_table *sgt,
28 size_t surface_size,
29 void *scatter_buffer_ptr,
30 size_t scatter_buffer_size);
22 31
23#endif 32#endif
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 98ff55cc..8609605b 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -207,6 +207,11 @@ static const struct gpu_ops gp10b_ops = {
207 .pg_gr_load_gating_prod = 207 .pg_gr_load_gating_prod =
208 gr_gp10b_pg_gr_load_gating_prod, 208 gr_gp10b_pg_gr_load_gating_prod,
209 }, 209 },
210 .cde = {
211 .get_program_numbers = gp10b_cde_get_program_numbers,
212 .need_scatter_buffer = gp10b_need_scatter_buffer,
213 .populate_scatter_buffer = gp10b_populate_scatter_buffer,
214 },
210 .chip_init_gpu_characteristics = gp10b_init_gpu_characteristics, 215 .chip_init_gpu_characteristics = gp10b_init_gpu_characteristics,
211 .get_litter_value = gp10b_get_litter_value, 216 .get_litter_value = gp10b_get_litter_value,
212}; 217};
@@ -219,6 +224,7 @@ int gp10b_init_hal(struct gk20a *g)
219 224
220 gops->ltc = gp10b_ops.ltc; 225 gops->ltc = gp10b_ops.ltc;
221 gops->clock_gating = gp10b_ops.clock_gating; 226 gops->clock_gating = gp10b_ops.clock_gating;
227 gops->cde = gp10b_ops.cde;
222 228
223 /* Lone Functions */ 229 /* Lone Functions */
224 gops->chip_init_gpu_characteristics = 230 gops->chip_init_gpu_characteristics =
@@ -278,7 +284,6 @@ int gp10b_init_hal(struct gk20a *g)
278 gk20a_init_debug_ops(gops); 284 gk20a_init_debug_ops(gops);
279 gk20a_init_dbg_session_ops(gops); 285 gk20a_init_dbg_session_ops(gops);
280 gp10b_init_regops(gops); 286 gp10b_init_regops(gops);
281 gp10b_init_cde_ops(gops);
282 gp10b_init_therm_ops(gops); 287 gp10b_init_therm_ops(gops);
283 gk20a_init_tsg_ops(gops); 288 gk20a_init_tsg_ops(gops);
284 gk20a_init_pramin_ops(gops); 289 gk20a_init_pramin_ops(gops);