diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/therm_gp10b.c | 33 |
1 files changed, 29 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/therm_gp10b.c b/drivers/gpu/nvgpu/gp10b/therm_gp10b.c index 63efc945..7f43cb56 100644 --- a/drivers/gpu/nvgpu/gp10b/therm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/therm_gp10b.c | |||
@@ -78,28 +78,53 @@ static int gp10b_init_therm_setup_hw(struct gk20a *g) | |||
78 | return 0; | 78 | return 0; |
79 | } | 79 | } |
80 | 80 | ||
81 | static int gp10b_update_therm_gate_ctrl(struct gk20a *g) | 81 | static int gp10b_elcg_init_idle_filters(struct gk20a *g) |
82 | { | 82 | { |
83 | u32 gate_ctrl; | 83 | u32 gate_ctrl, idle_filter; |
84 | u32 engine_id; | 84 | u32 engine_id; |
85 | u32 active_engine_id = 0; | 85 | u32 active_engine_id = 0; |
86 | struct fifo_gk20a *f = &g->fifo; | 86 | struct fifo_gk20a *f = &g->fifo; |
87 | 87 | ||
88 | gk20a_dbg_fn(""); | ||
89 | |||
88 | for (engine_id = 0; engine_id < f->num_engines; engine_id++) { | 90 | for (engine_id = 0; engine_id < f->num_engines; engine_id++) { |
89 | active_engine_id = f->active_engines_list[engine_id]; | 91 | active_engine_id = f->active_engines_list[engine_id]; |
90 | gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); | 92 | gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); |
93 | |||
94 | if (tegra_platform_is_linsim()) { | ||
95 | gate_ctrl = set_field(gate_ctrl, | ||
96 | therm_gate_ctrl_eng_delay_after_m(), | ||
97 | therm_gate_ctrl_eng_delay_after_f(4)); | ||
98 | } | ||
99 | |||
100 | /* 2 * (1 << 9) = 1024 clks */ | ||
101 | gate_ctrl = set_field(gate_ctrl, | ||
102 | therm_gate_ctrl_eng_idle_filt_exp_m(), | ||
103 | therm_gate_ctrl_eng_idle_filt_exp_f(9)); | ||
104 | gate_ctrl = set_field(gate_ctrl, | ||
105 | therm_gate_ctrl_eng_idle_filt_mant_m(), | ||
106 | therm_gate_ctrl_eng_idle_filt_mant_f(2)); | ||
91 | gate_ctrl = set_field(gate_ctrl, | 107 | gate_ctrl = set_field(gate_ctrl, |
92 | therm_gate_ctrl_eng_delay_before_m(), | 108 | therm_gate_ctrl_eng_delay_before_m(), |
93 | therm_gate_ctrl_eng_delay_before_f(4)); | 109 | therm_gate_ctrl_eng_delay_before_f(4)); |
94 | gk20a_writel(g, therm_gate_ctrl_r(active_engine_id), gate_ctrl); | 110 | gk20a_writel(g, therm_gate_ctrl_r(active_engine_id), gate_ctrl); |
95 | } | 111 | } |
96 | 112 | ||
113 | /* default fecs_idle_filter to 0 */ | ||
114 | idle_filter = gk20a_readl(g, therm_fecs_idle_filter_r()); | ||
115 | idle_filter &= ~therm_fecs_idle_filter_value_m(); | ||
116 | gk20a_writel(g, therm_fecs_idle_filter_r(), idle_filter); | ||
117 | /* default hubmmu_idle_filter to 0 */ | ||
118 | idle_filter = gk20a_readl(g, therm_hubmmu_idle_filter_r()); | ||
119 | idle_filter &= ~therm_hubmmu_idle_filter_value_m(); | ||
120 | gk20a_writel(g, therm_hubmmu_idle_filter_r(), idle_filter); | ||
121 | |||
122 | gk20a_dbg_fn("done"); | ||
97 | return 0; | 123 | return 0; |
98 | } | 124 | } |
99 | 125 | ||
100 | void gp10b_init_therm_ops(struct gpu_ops *gops) | 126 | void gp10b_init_therm_ops(struct gpu_ops *gops) |
101 | { | 127 | { |
102 | gops->therm.init_therm_setup_hw = gp10b_init_therm_setup_hw; | 128 | gops->therm.init_therm_setup_hw = gp10b_init_therm_setup_hw; |
103 | gops->therm.update_therm_gate_ctrl = gp10b_update_therm_gate_ctrl; | 129 | gops->therm.elcg_init_idle_filters = gp10b_elcg_init_idle_filters; |
104 | |||
105 | } | 130 | } |