diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/rpfb_gp10b.c | 1 |
4 files changed, 4 insertions, 29 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 934ddb9a..8cd2a582 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include "common/clock_gating/gp10b_gating_reglist.h" | 26 | #include "common/clock_gating/gp10b_gating_reglist.h" |
27 | #include "common/ptimer/ptimer_gk20a.h" | 27 | #include "common/ptimer/ptimer_gk20a.h" |
28 | #include "common/bus/bus_gm20b.h" | 28 | #include "common/bus/bus_gm20b.h" |
29 | #include "common/bus/bus_gp10b.h" | ||
29 | 30 | ||
30 | #include "gk20a/gk20a.h" | 31 | #include "gk20a/gk20a.h" |
31 | #include "gk20a/fifo_gk20a.h" | 32 | #include "gk20a/fifo_gk20a.h" |
@@ -554,7 +555,6 @@ static const struct gpu_ops gp10b_ops = { | |||
554 | .init_inst_block = gk20a_init_inst_block, | 555 | .init_inst_block = gk20a_init_inst_block, |
555 | .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, | 556 | .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, |
556 | .init_bar2_vm = gp10b_init_bar2_vm, | 557 | .init_bar2_vm = gp10b_init_bar2_vm, |
557 | .init_bar2_mm_hw_setup = gp10b_init_bar2_mm_hw_setup, | ||
558 | .remove_bar2_vm = gp10b_remove_bar2_vm, | 558 | .remove_bar2_vm = gp10b_remove_bar2_vm, |
559 | .get_kind_invalid = gm20b_get_kind_invalid, | 559 | .get_kind_invalid = gm20b_get_kind_invalid, |
560 | .get_kind_pitch = gm20b_get_kind_pitch, | 560 | .get_kind_pitch = gm20b_get_kind_pitch, |
@@ -653,6 +653,7 @@ static const struct gpu_ops gp10b_ops = { | |||
653 | .init_hw = gk20a_bus_init_hw, | 653 | .init_hw = gk20a_bus_init_hw, |
654 | .isr = gk20a_bus_isr, | 654 | .isr = gk20a_bus_isr, |
655 | .bar1_bind = gm20b_bus_bar1_bind, | 655 | .bar1_bind = gm20b_bus_bar1_bind, |
656 | .bar2_bind = gp10b_bus_bar2_bind, | ||
656 | .set_bar0_window = gk20a_bus_set_bar0_window, | 657 | .set_bar0_window = gk20a_bus_set_bar0_window, |
657 | }, | 658 | }, |
658 | .ptimer = { | 659 | .ptimer = { |
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index acd42dd8..50c96f36 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -34,7 +34,6 @@ | |||
34 | 34 | ||
35 | #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> | 35 | #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> |
36 | #include <nvgpu/hw/gp10b/hw_ram_gp10b.h> | 36 | #include <nvgpu/hw/gp10b/hw_ram_gp10b.h> |
37 | #include <nvgpu/hw/gp10b/hw_bus_gp10b.h> | ||
38 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> | 37 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> |
39 | 38 | ||
40 | u32 gp10b_mm_get_default_big_page_size(void) | 39 | u32 gp10b_mm_get_default_big_page_size(void) |
@@ -62,8 +61,8 @@ int gp10b_init_mm_setup_hw(struct gk20a *g) | |||
62 | 61 | ||
63 | g->ops.bus.bar1_bind(g, inst_block); | 62 | g->ops.bus.bar1_bind(g, inst_block); |
64 | 63 | ||
65 | if (g->ops.mm.init_bar2_mm_hw_setup) { | 64 | if (g->ops.bus.bar2_bind) { |
66 | err = g->ops.mm.init_bar2_mm_hw_setup(g); | 65 | err = g->ops.bus.bar2_bind(g, &g->mm.bar2.inst_block); |
67 | if (err) | 66 | if (err) |
68 | return err; | 67 | return err; |
69 | } | 68 | } |
@@ -109,29 +108,6 @@ clean_up_va: | |||
109 | return err; | 108 | return err; |
110 | } | 109 | } |
111 | 110 | ||
112 | int gp10b_init_bar2_mm_hw_setup(struct gk20a *g) | ||
113 | { | ||
114 | struct mm_gk20a *mm = &g->mm; | ||
115 | struct nvgpu_mem *inst_block = &mm->bar2.inst_block; | ||
116 | u64 inst_pa = nvgpu_inst_block_addr(g, inst_block); | ||
117 | |||
118 | nvgpu_log_fn(g, " "); | ||
119 | |||
120 | inst_pa = (u32)(inst_pa >> bus_bar2_block_ptr_shift_v()); | ||
121 | nvgpu_log_info(g, "bar2 inst block ptr: 0x%08x", (u32)inst_pa); | ||
122 | |||
123 | gk20a_writel(g, bus_bar2_block_r(), | ||
124 | nvgpu_aperture_mask(g, inst_block, | ||
125 | bus_bar2_block_target_sys_mem_ncoh_f(), | ||
126 | bus_bar2_block_target_sys_mem_coh_f(), | ||
127 | bus_bar2_block_target_vid_mem_f()) | | ||
128 | bus_bar2_block_mode_virtual_f() | | ||
129 | bus_bar2_block_ptr_f(inst_pa)); | ||
130 | |||
131 | nvgpu_log_fn(g, "done"); | ||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | static void update_gmmu_pde3_locked(struct vm_gk20a *vm, | 111 | static void update_gmmu_pde3_locked(struct vm_gk20a *vm, |
136 | const struct gk20a_mmu_level *l, | 112 | const struct gk20a_mmu_level *l, |
137 | struct nvgpu_gmmu_pd *pd, | 113 | struct nvgpu_gmmu_pd *pd, |
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h index 5522d02e..4f37aae6 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h | |||
@@ -32,7 +32,6 @@ u32 gp10b_mm_get_default_big_page_size(void); | |||
32 | u32 gp10b_mm_get_iommu_bit(struct gk20a *g); | 32 | u32 gp10b_mm_get_iommu_bit(struct gk20a *g); |
33 | int gp10b_init_mm_setup_hw(struct gk20a *g); | 33 | int gp10b_init_mm_setup_hw(struct gk20a *g); |
34 | int gp10b_init_bar2_vm(struct gk20a *g); | 34 | int gp10b_init_bar2_vm(struct gk20a *g); |
35 | int gp10b_init_bar2_mm_hw_setup(struct gk20a *g); | ||
36 | const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, | 35 | const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, |
37 | u32 big_page_size); | 36 | u32 big_page_size); |
38 | void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | 37 | void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, |
diff --git a/drivers/gpu/nvgpu/gp10b/rpfb_gp10b.c b/drivers/gpu/nvgpu/gp10b/rpfb_gp10b.c index 3f089545..7a714441 100644 --- a/drivers/gpu/nvgpu/gp10b/rpfb_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/rpfb_gp10b.c | |||
@@ -30,7 +30,6 @@ | |||
30 | 30 | ||
31 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> | 31 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> |
32 | #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> | 32 | #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> |
33 | #include <nvgpu/hw/gp10b/hw_bus_gp10b.h> | ||
34 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> | 33 | #include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h> |
35 | 34 | ||
36 | int gp10b_replayable_pagefault_buffer_init(struct gk20a *g) | 35 | int gp10b_replayable_pagefault_buffer_init(struct gk20a *g) |