1 files changed, 43 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h
new file mode 100644
index 00000000..44e0ec98
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.h
@@ -0,0 +1,43 @@
+/*
+ * GP10B PMU
+ *
+ * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __PMU_GP10B_H_
+#define __PMU_GP10B_H_
+
+struct gk20a;
+
+
+bool gp10b_is_lazy_bootstrap(u32 falcon_id);
+bool gp10b_is_priv_load(u32 falcon_id);
+bool gp10b_is_pmu_supported(struct gk20a *g);
+int gp10b_init_pmu_setup_hw1(struct gk20a *g);
+void gp10b_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
+                struct pmu_pg_stats_data *pg_stat_data);
+int gp10b_pmu_setup_elpg(struct gk20a *g);
+void pmu_dump_security_fuses_gp10b(struct gk20a *g);
+int gp10b_load_falcon_ucode(struct gk20a *g, u32 falconidmask);
+int gp10b_pg_gr_init(struct gk20a *g, u32 pg_engine_id);
+void gp10b_write_dmatrfbase(struct gk20a *g, u32 addr);
+
+#endif /*__PMU_GP10B_H_*/