diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h new file mode 100644 index 00000000..b6bcb04a --- /dev/null +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef MM_GP10B_H | ||
24 | #define MM_GP10B_H | ||
25 | |||
26 | struct gk20a; | ||
27 | struct gk20a_mmu_level; | ||
28 | struct nvgpu_mem; | ||
29 | struct vm_gk20a; | ||
30 | |||
31 | u32 gp10b_mm_get_default_big_page_size(void); | ||
32 | u32 gp10b_mm_get_iommu_bit(struct gk20a *g); | ||
33 | int gp10b_init_mm_setup_hw(struct gk20a *g); | ||
34 | int gb10b_init_bar2_vm(struct gk20a *g); | ||
35 | int gb10b_init_bar2_mm_hw_setup(struct gk20a *g); | ||
36 | const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g, | ||
37 | u32 big_page_size); | ||
38 | void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | ||
39 | struct vm_gk20a *vm); | ||
40 | void gp10b_remove_bar2_vm(struct gk20a *g); | ||
41 | |||
42 | #endif | ||