diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 58 |
1 files changed, 57 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index ff248f51..00e41fa7 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B MMU | 2 | * GP10B MMU |
3 | * | 3 | * |
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -14,15 +14,71 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/pm_runtime.h> | 16 | #include <linux/pm_runtime.h> |
17 | #include <linux/dma-mapping.h> | ||
17 | #include "gk20a/gk20a.h" | 18 | #include "gk20a/gk20a.h" |
19 | #include "mm_gp10b.h" | ||
20 | #include "hw_ram_gp10b.h" | ||
21 | #include "hw_bus_gp10b.h" | ||
18 | 22 | ||
19 | u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g) | 23 | u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g) |
20 | { | 24 | { |
21 | return 36; | 25 | return 36; |
22 | } | 26 | } |
23 | 27 | ||
28 | static int gb10b_init_bar2_vm(struct gk20a *g) | ||
29 | { | ||
30 | int err; | ||
31 | struct mm_gk20a *mm = &g->mm; | ||
32 | struct vm_gk20a *vm = &mm->bar2.vm; | ||
33 | struct inst_desc *inst_block = &mm->bar2.inst_block; | ||
34 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | ||
35 | |||
36 | /* BAR2 aperture size is 32MB */ | ||
37 | mm->bar2.aperture_size = 32 << 20; | ||
38 | gk20a_dbg_info("bar2 vm size = 0x%x", mm->bar2.aperture_size); | ||
39 | gk20a_init_vm(mm, vm, big_page_size, SZ_4K, | ||
40 | mm->bar2.aperture_size, false, "bar2"); | ||
41 | |||
42 | /* allocate instance mem for bar2 */ | ||
43 | err = gk20a_alloc_inst_block(g, inst_block); | ||
44 | if (err) | ||
45 | goto clean_up_va; | ||
46 | |||
47 | gk20a_init_inst_block(inst_block, vm, big_page_size); | ||
48 | |||
49 | return 0; | ||
50 | |||
51 | clean_up_va: | ||
52 | gk20a_deinit_vm(vm); | ||
53 | return err; | ||
54 | } | ||
55 | |||
56 | |||
57 | static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) | ||
58 | { | ||
59 | struct mm_gk20a *mm = &g->mm; | ||
60 | struct inst_desc *inst_block = &mm->bar2.inst_block; | ||
61 | phys_addr_t inst_pa = inst_block->cpu_pa; | ||
62 | |||
63 | gk20a_dbg_fn(""); | ||
64 | |||
65 | g->ops.fb.set_mmu_page_size(g); | ||
66 | |||
67 | inst_pa = (u32)(inst_pa >> bus_bar2_block_ptr_shift_v()); | ||
68 | gk20a_dbg_info("bar2 inst block ptr: 0x%08x", (u32)inst_pa); | ||
69 | |||
70 | gk20a_writel(g, bus_bar2_block_r(), | ||
71 | bus_bar2_block_target_vid_mem_f() | | ||
72 | bus_bar2_block_mode_virtual_f() | | ||
73 | bus_bar2_block_ptr_f(inst_pa)); | ||
74 | |||
75 | gk20a_dbg_fn("done"); | ||
76 | return 0; | ||
77 | } | ||
24 | void gp10b_init_mm(struct gpu_ops *gops) | 78 | void gp10b_init_mm(struct gpu_ops *gops) |
25 | { | 79 | { |
26 | gm20b_init_mm(gops); | 80 | gm20b_init_mm(gops); |
27 | gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits; | 81 | gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits; |
82 | gops->mm.init_bar2_vm = gb10b_init_bar2_vm; | ||
83 | gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup; | ||
28 | } | 84 | } |