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path: root/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/mm_gp10b.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 86d5f5df..43d9fd28 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -143,12 +143,13 @@ static void update_gmmu_pde3_locked(struct vm_gk20a *vm,
143 struct nvgpu_gmmu_attrs *attrs) 143 struct nvgpu_gmmu_attrs *attrs)
144{ 144{
145 struct gk20a *g = gk20a_from_vm(vm); 145 struct gk20a *g = gk20a_from_vm(vm);
146 struct nvgpu_gmmu_pd *next_pd = &pd->entries[pd_idx];
146 u32 pd_offset = pd_offset_from_index(l, pd_idx); 147 u32 pd_offset = pd_offset_from_index(l, pd_idx);
147 u32 pde_v[2] = {0, 0}; 148 u32 pde_v[2] = {0, 0};
148 149
149 phys_addr >>= gmmu_new_pde_address_shift_v(); 150 phys_addr >>= gmmu_new_pde_address_shift_v();
150 151
151 pde_v[0] |= nvgpu_aperture_mask(g, pd->mem, 152 pde_v[0] |= nvgpu_aperture_mask(g, next_pd->mem,
152 gmmu_new_pde_aperture_sys_mem_ncoh_f(), 153 gmmu_new_pde_aperture_sys_mem_ncoh_f(),
153 gmmu_new_pde_aperture_sys_mem_coh_f(), 154 gmmu_new_pde_aperture_sys_mem_coh_f(),
154 gmmu_new_pde_aperture_video_memory_f()); 155 gmmu_new_pde_aperture_video_memory_f());
@@ -177,6 +178,7 @@ static void update_gmmu_pde0_locked(struct vm_gk20a *vm,
177 struct nvgpu_gmmu_attrs *attrs) 178 struct nvgpu_gmmu_attrs *attrs)
178{ 179{
179 struct gk20a *g = gk20a_from_vm(vm); 180 struct gk20a *g = gk20a_from_vm(vm);
181 struct nvgpu_gmmu_pd *next_pd = &pd->entries[pd_idx];
180 bool small_valid, big_valid; 182 bool small_valid, big_valid;
181 u32 small_addr = 0, big_addr = 0; 183 u32 small_addr = 0, big_addr = 0;
182 u32 pd_offset = pd_offset_from_index(l, pd_idx); 184 u32 pd_offset = pd_offset_from_index(l, pd_idx);
@@ -194,7 +196,7 @@ static void update_gmmu_pde0_locked(struct vm_gk20a *vm,
194 if (small_valid) { 196 if (small_valid) {
195 pde_v[2] |= 197 pde_v[2] |=
196 gmmu_new_dual_pde_address_small_sys_f(small_addr); 198 gmmu_new_dual_pde_address_small_sys_f(small_addr);
197 pde_v[2] |= nvgpu_aperture_mask(g, pd->mem, 199 pde_v[2] |= nvgpu_aperture_mask(g, next_pd->mem,
198 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(), 200 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(),
199 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(), 201 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(),
200 gmmu_new_dual_pde_aperture_small_video_memory_f()); 202 gmmu_new_dual_pde_aperture_small_video_memory_f());
@@ -205,7 +207,7 @@ static void update_gmmu_pde0_locked(struct vm_gk20a *vm,
205 if (big_valid) { 207 if (big_valid) {
206 pde_v[0] |= gmmu_new_dual_pde_address_big_sys_f(big_addr); 208 pde_v[0] |= gmmu_new_dual_pde_address_big_sys_f(big_addr);
207 pde_v[0] |= gmmu_new_dual_pde_vol_big_true_f(); 209 pde_v[0] |= gmmu_new_dual_pde_vol_big_true_f();
208 pde_v[0] |= nvgpu_aperture_mask(g, pd->mem, 210 pde_v[0] |= nvgpu_aperture_mask(g, next_pd->mem,
209 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(), 211 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(),
210 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(), 212 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(),
211 gmmu_new_dual_pde_aperture_big_video_memory_f()); 213 gmmu_new_dual_pde_aperture_big_video_memory_f());