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path: root/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h
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-rw-r--r--drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h581
1 files changed, 0 insertions, 581 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h
deleted file mode 100644
index 4a3f634e..00000000
--- a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h
+++ /dev/null
@@ -1,581 +0,0 @@
1/*
2 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16/*
17 * Function naming determines intended use:
18 *
19 * <x>_r(void) : Returns the offset for register <x>.
20 *
21 * <x>_o(void) : Returns the offset for element <x>.
22 *
23 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
24 *
25 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
26 *
27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
28 * and masked to place it at field <y> of register <x>. This value
29 * can be |'d with others to produce a full register value for
30 * register <x>.
31 *
32 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
33 * value can be ~'d and then &'d to clear the value of field <y> for
34 * register <x>.
35 *
36 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
37 * to place it at field <y> of register <x>. This value can be |'d
38 * with others to produce a full register value for <x>.
39 *
40 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
42 * This value is suitable for direct comparison with other unshifted
43 * values appropriate for use in field <y> of register <x>.
44 *
45 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
46 * field <y> of register <x>. This value is suitable for direct
47 * comparison with unshifted values appropriate for use in field <y>
48 * of register <x>.
49 */
50#ifndef _hw_ltc_gp10b_h_
51#define _hw_ltc_gp10b_h_
52
53static inline u32 ltc_pltcg_base_v(void)
54{
55 return 0x00140000;
56}
57static inline u32 ltc_pltcg_extent_v(void)
58{
59 return 0x0017ffff;
60}
61static inline u32 ltc_ltc0_ltss_v(void)
62{
63 return 0x00140200;
64}
65static inline u32 ltc_ltc0_lts0_v(void)
66{
67 return 0x00140400;
68}
69static inline u32 ltc_ltcs_ltss_v(void)
70{
71 return 0x0017e200;
72}
73static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void)
74{
75 return 0x0014046c;
76}
77static inline u32 ltc_ltc0_lts0_dstg_cfg0_r(void)
78{
79 return 0x00140518;
80}
81static inline u32 ltc_ltcs_ltss_dstg_cfg0_r(void)
82{
83 return 0x0017e318;
84}
85static inline u32 ltc_ltcs_ltss_dstg_cfg0_vdc_4to2_disable_m(void)
86{
87 return 0x1 << 15;
88}
89static inline u32 ltc_ltc0_lts0_tstg_cfg1_r(void)
90{
91 return 0x00140494;
92}
93static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_ways_v(u32 r)
94{
95 return (r >> 0) & 0xffff;
96}
97static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_v(u32 r)
98{
99 return (r >> 16) & 0x3;
100}
101static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_all_v(void)
102{
103 return 0x00000000;
104}
105static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_half_v(void)
106{
107 return 0x00000001;
108}
109static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_quarter_v(void)
110{
111 return 0x00000002;
112}
113static inline u32 ltc_ltcs_ltss_cbc_ctrl1_r(void)
114{
115 return 0x0017e26c;
116}
117static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clean_active_f(void)
118{
119 return 0x1;
120}
121static inline u32 ltc_ltcs_ltss_cbc_ctrl1_invalidate_active_f(void)
122{
123 return 0x2;
124}
125static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_v(u32 r)
126{
127 return (r >> 2) & 0x1;
128}
129static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_v(void)
130{
131 return 0x00000001;
132}
133static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_f(void)
134{
135 return 0x4;
136}
137static inline u32 ltc_ltc0_lts0_cbc_ctrl1_r(void)
138{
139 return 0x0014046c;
140}
141static inline u32 ltc_ltcs_ltss_cbc_ctrl2_r(void)
142{
143 return 0x0017e270;
144}
145static inline u32 ltc_ltcs_ltss_cbc_ctrl2_clear_lower_bound_f(u32 v)
146{
147 return (v & 0x3ffff) << 0;
148}
149static inline u32 ltc_ltcs_ltss_cbc_ctrl3_r(void)
150{
151 return 0x0017e274;
152}
153static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_f(u32 v)
154{
155 return (v & 0x3ffff) << 0;
156}
157static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_init_v(void)
158{
159 return 0x0003ffff;
160}
161static inline u32 ltc_ltcs_ltss_cbc_base_r(void)
162{
163 return 0x0017e278;
164}
165static inline u32 ltc_ltcs_ltss_cbc_base_alignment_shift_v(void)
166{
167 return 0x0000000b;
168}
169static inline u32 ltc_ltcs_ltss_cbc_base_address_v(u32 r)
170{
171 return (r >> 0) & 0x3ffffff;
172}
173static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_r(void)
174{
175 return 0x0017e27c;
176}
177static inline u32 ltc_ltcs_misc_ltc_num_active_ltcs_r(void)
178{
179 return 0x0017e000;
180}
181static inline u32 ltc_ltcs_ltss_cbc_param_r(void)
182{
183 return 0x0017e280;
184}
185static inline u32 ltc_ltcs_ltss_cbc_param_comptags_per_cache_line_v(u32 r)
186{
187 return (r >> 0) & 0xffff;
188}
189static inline u32 ltc_ltcs_ltss_cbc_param_cache_line_size_v(u32 r)
190{
191 return (r >> 24) & 0xf;
192}
193static inline u32 ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(u32 r)
194{
195 return (r >> 28) & 0xf;
196}
197static inline u32 ltc_ltcs_ltss_cbc_param2_r(void)
198{
199 return 0x0017e3f4;
200}
201static inline u32 ltc_ltcs_ltss_cbc_param2_gobs_per_comptagline_per_slice_v(u32 r)
202{
203 return (r >> 0) & 0xffff;
204}
205static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_r(void)
206{
207 return 0x0017e2ac;
208}
209static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_max_ways_evict_last_f(u32 v)
210{
211 return (v & 0x1f) << 16;
212}
213static inline u32 ltc_ltcs_ltss_dstg_zbc_index_r(void)
214{
215 return 0x0017e338;
216}
217static inline u32 ltc_ltcs_ltss_dstg_zbc_index_address_f(u32 v)
218{
219 return (v & 0xf) << 0;
220}
221static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value_r(u32 i)
222{
223 return 0x0017e33c + i*4;
224}
225static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value__size_1_v(void)
226{
227 return 0x00000004;
228}
229static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_r(void)
230{
231 return 0x0017e34c;
232}
233static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_s(void)
234{
235 return 32;
236}
237static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_f(u32 v)
238{
239 return (v & 0xffffffff) << 0;
240}
241static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_m(void)
242{
243 return 0xffffffff << 0;
244}
245static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_v(u32 r)
246{
247 return (r >> 0) & 0xffffffff;
248}
249static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void)
250{
251 return 0x0017e2b0;
252}
253static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(void)
254{
255 return 0x10000000;
256}
257static inline u32 ltc_ltcs_ltss_g_elpg_r(void)
258{
259 return 0x0017e214;
260}
261static inline u32 ltc_ltcs_ltss_g_elpg_flush_v(u32 r)
262{
263 return (r >> 0) & 0x1;
264}
265static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_v(void)
266{
267 return 0x00000001;
268}
269static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_f(void)
270{
271 return 0x1;
272}
273static inline u32 ltc_ltc0_ltss_g_elpg_r(void)
274{
275 return 0x00140214;
276}
277static inline u32 ltc_ltc0_ltss_g_elpg_flush_v(u32 r)
278{
279 return (r >> 0) & 0x1;
280}
281static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_v(void)
282{
283 return 0x00000001;
284}
285static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_f(void)
286{
287 return 0x1;
288}
289static inline u32 ltc_ltc1_ltss_g_elpg_r(void)
290{
291 return 0x00142214;
292}
293static inline u32 ltc_ltc1_ltss_g_elpg_flush_v(u32 r)
294{
295 return (r >> 0) & 0x1;
296}
297static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_v(void)
298{
299 return 0x00000001;
300}
301static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_f(void)
302{
303 return 0x1;
304}
305static inline u32 ltc_ltcs_ltss_intr_r(void)
306{
307 return 0x0017e20c;
308}
309static inline u32 ltc_ltcs_ltss_intr_ecc_sec_error_pending_f(void)
310{
311 return 0x100;
312}
313static inline u32 ltc_ltcs_ltss_intr_ecc_ded_error_pending_f(void)
314{
315 return 0x200;
316}
317static inline u32 ltc_ltcs_ltss_intr_en_evicted_cb_m(void)
318{
319 return 0x1 << 20;
320}
321static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(void)
322{
323 return 0x1 << 30;
324}
325static inline u32 ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f(void)
326{
327 return 0x1000000;
328}
329static inline u32 ltc_ltcs_ltss_intr_en_ecc_ded_error_enabled_f(void)
330{
331 return 0x2000000;
332}
333static inline u32 ltc_ltc0_lts0_intr_r(void)
334{
335 return 0x0014040c;
336}
337static inline u32 ltc_ltc0_lts0_dstg_ecc_report_r(void)
338{
339 return 0x0014051c;
340}
341static inline u32 ltc_ltc0_lts0_dstg_ecc_report_sec_count_m(void)
342{
343 return 0xff << 0;
344}
345static inline u32 ltc_ltc0_lts0_dstg_ecc_report_sec_count_v(u32 r)
346{
347 return (r >> 0) & 0xff;
348}
349static inline u32 ltc_ltc0_lts0_dstg_ecc_report_ded_count_m(void)
350{
351 return 0xff << 16;
352}
353static inline u32 ltc_ltc0_lts0_dstg_ecc_report_ded_count_v(u32 r)
354{
355 return (r >> 16) & 0xff;
356}
357static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_r(void)
358{
359 return 0x0017e2a0;
360}
361static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_v(u32 r)
362{
363 return (r >> 0) & 0x1;
364}
365static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_v(void)
366{
367 return 0x00000001;
368}
369static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_f(void)
370{
371 return 0x1;
372}
373static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_v(u32 r)
374{
375 return (r >> 8) & 0xf;
376}
377static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_v(void)
378{
379 return 0x00000003;
380}
381static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_f(void)
382{
383 return 0x300;
384}
385static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_v(u32 r)
386{
387 return (r >> 28) & 0x1;
388}
389static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_v(void)
390{
391 return 0x00000001;
392}
393static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_f(void)
394{
395 return 0x10000000;
396}
397static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_v(u32 r)
398{
399 return (r >> 29) & 0x1;
400}
401static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_v(void)
402{
403 return 0x00000001;
404}
405static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_f(void)
406{
407 return 0x20000000;
408}
409static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_v(u32 r)
410{
411 return (r >> 30) & 0x1;
412}
413static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_v(void)
414{
415 return 0x00000001;
416}
417static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_f(void)
418{
419 return 0x40000000;
420}
421static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_r(void)
422{
423 return 0x0017e2a4;
424}
425static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_v(u32 r)
426{
427 return (r >> 0) & 0x1;
428}
429static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_v(void)
430{
431 return 0x00000001;
432}
433static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_f(void)
434{
435 return 0x1;
436}
437static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_v(u32 r)
438{
439 return (r >> 8) & 0xf;
440}
441static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_v(void)
442{
443 return 0x00000003;
444}
445static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_f(void)
446{
447 return 0x300;
448}
449static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_v(u32 r)
450{
451 return (r >> 16) & 0x1;
452}
453static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_v(void)
454{
455 return 0x00000001;
456}
457static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_f(void)
458{
459 return 0x10000;
460}
461static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_v(u32 r)
462{
463 return (r >> 28) & 0x1;
464}
465static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_v(void)
466{
467 return 0x00000001;
468}
469static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_f(void)
470{
471 return 0x10000000;
472}
473static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_v(u32 r)
474{
475 return (r >> 29) & 0x1;
476}
477static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_v(void)
478{
479 return 0x00000001;
480}
481static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_f(void)
482{
483 return 0x20000000;
484}
485static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_v(u32 r)
486{
487 return (r >> 30) & 0x1;
488}
489static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_v(void)
490{
491 return 0x00000001;
492}
493static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_f(void)
494{
495 return 0x40000000;
496}
497static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_r(void)
498{
499 return 0x001402a0;
500}
501static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_v(u32 r)
502{
503 return (r >> 0) & 0x1;
504}
505static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_v(void)
506{
507 return 0x00000001;
508}
509static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_f(void)
510{
511 return 0x1;
512}
513static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_r(void)
514{
515 return 0x001402a4;
516}
517static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_v(u32 r)
518{
519 return (r >> 0) & 0x1;
520}
521static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_v(void)
522{
523 return 0x00000001;
524}
525static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_f(void)
526{
527 return 0x1;
528}
529static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_r(void)
530{
531 return 0x001422a0;
532}
533static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_v(u32 r)
534{
535 return (r >> 0) & 0x1;
536}
537static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_v(void)
538{
539 return 0x00000001;
540}
541static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_f(void)
542{
543 return 0x1;
544}
545static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_r(void)
546{
547 return 0x001422a4;
548}
549static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_v(u32 r)
550{
551 return (r >> 0) & 0x1;
552}
553static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_v(void)
554{
555 return 0x00000001;
556}
557static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_f(void)
558{
559 return 0x1;
560}
561static inline u32 ltc_ltc0_lts0_tstg_info_1_r(void)
562{
563 return 0x0014058c;
564}
565static inline u32 ltc_ltc0_lts0_tstg_info_1_slice_size_in_kb_v(u32 r)
566{
567 return (r >> 0) & 0xffff;
568}
569static inline u32 ltc_ltc0_lts0_tstg_info_1_slices_per_l2_v(u32 r)
570{
571 return (r >> 16) & 0x1f;
572}
573static inline u32 ltc_ltca_g_axi_pctrl_r(void)
574{
575 return 0x00160000;
576}
577static inline u32 ltc_ltca_g_axi_pctrl_user_sid_f(u32 v)
578{
579 return (v & 0xff) << 2;
580}
581#endif
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