diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/hal_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index feac284b..80018910 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -279,6 +279,10 @@ static const struct gpu_ops gp10b_ops = { | |||
279 | .resetup_ramfc = gp10b_fifo_resetup_ramfc, | 279 | .resetup_ramfc = gp10b_fifo_resetup_ramfc, |
280 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | 280 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, |
281 | }, | 281 | }, |
282 | .gr_ctx = { | ||
283 | .get_netlist_name = gr_gp10b_get_netlist_name, | ||
284 | .is_fw_defined = gr_gp10b_is_firmware_defined, | ||
285 | }, | ||
282 | .mc = { | 286 | .mc = { |
283 | .intr_enable = mc_gp10b_intr_enable, | 287 | .intr_enable = mc_gp10b_intr_enable, |
284 | .intr_unit_config = mc_gp10b_intr_unit_config, | 288 | .intr_unit_config = mc_gp10b_intr_unit_config, |
@@ -352,6 +356,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
352 | gops->ce2 = gp10b_ops.ce2; | 356 | gops->ce2 = gp10b_ops.ce2; |
353 | gops->clock_gating = gp10b_ops.clock_gating; | 357 | gops->clock_gating = gp10b_ops.clock_gating; |
354 | gops->fifo = gp10b_ops.fifo; | 358 | gops->fifo = gp10b_ops.fifo; |
359 | gops->gr_ctx = gp10b_ops.gr_ctx; | ||
355 | gops->mc = gp10b_ops.mc; | 360 | gops->mc = gp10b_ops.mc; |
356 | gops->debug = gp10b_ops.debug; | 361 | gops->debug = gp10b_ops.debug; |
357 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; | 362 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; |
@@ -369,6 +374,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
369 | gp10b_ops.chip_init_gpu_characteristics; | 374 | gp10b_ops.chip_init_gpu_characteristics; |
370 | gops->get_litter_value = gp10b_ops.get_litter_value; | 375 | gops->get_litter_value = gp10b_ops.get_litter_value; |
371 | 376 | ||
377 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); | ||
372 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); | 378 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); |
373 | 379 | ||
374 | #ifdef CONFIG_TEGRA_ACR | 380 | #ifdef CONFIG_TEGRA_ACR |
@@ -412,7 +418,6 @@ int gp10b_init_hal(struct gk20a *g) | |||
412 | gp10b_init_gr(g); | 418 | gp10b_init_gr(g); |
413 | gp10b_init_fecs_trace_ops(gops); | 419 | gp10b_init_fecs_trace_ops(gops); |
414 | gp10b_init_fb(gops); | 420 | gp10b_init_fb(gops); |
415 | gp10b_init_gr_ctx(gops); | ||
416 | gp10b_init_mm(gops); | 421 | gp10b_init_mm(gops); |
417 | gp10b_init_pmu_ops(g); | 422 | gp10b_init_pmu_ops(g); |
418 | gp10b_init_regops(gops); | 423 | gp10b_init_regops(gops); |