1 files changed, 103 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
new file mode 100644
index 00000000..5338789f
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -0,0 +1,103 @@
+/*
+ * GP10B GPU GR
+ *
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#ifndef _NVGPU_GR_GP10B_H_
+#define _NVGPU_GR_GP10B_H_
+#include <linux/version.h>
+struct gpu_ops;
+enum {
+        PASCAL_CHANNEL_GPFIFO_A  = 0xC06F,
+        PASCAL_A                 = 0xC097,
+        PASCAL_COMPUTE_A         = 0xC0C0,
+        PASCAL_DMA_COPY_A        = 0xC0B5,
+        PASCAL_DMA_COPY_B        = 0xC1B5,
+};
+#define NVC097_SET_GO_IDLE_TIMEOUT              0x022c
+#define NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE   0x02dc
+#define NVC097_SET_COALESCE_BUFFER_SIZE         0x1028
+#define NVC097_SET_CIRCULAR_BUFFER_SIZE         0x1280
+#define NVC097_SET_SHADER_EXCEPTIONS            0x1528
+#define NVC0C0_SET_SHADER_EXCEPTIONS            0x1528
+void gp10b_init_gr(struct gpu_ops *ops);
+int gr_gp10b_init_fs_state(struct gk20a *g);
+int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
+                        struct mem_desc *mem);
+void gr_gp10b_create_sysfs(struct device *dev);
+struct ecc_stat {
+        char **names;
+        u32 *counters;
+        struct hlist_node hash_node;
+};
+struct gr_t18x {
+        struct {
+                u32 preempt_image_size;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
+                u32 force_preemption_gfxp;
+                u32 force_preemption_cilp;
+                u32 dump_ctxsw_stats_on_channel_close;
+#else
+                bool force_preemption_gfxp;
+                bool force_preemption_cilp;
+                bool dump_ctxsw_stats_on_channel_close;
+#endif
+                struct dentry *debugfs_force_preemption_cilp;
+                struct dentry *debugfs_force_preemption_gfxp;
+                struct dentry *debugfs_dump_ctxsw_stats;
+        } ctx_vars;
+        struct {
+                struct ecc_stat sm_lrf_single_err_count;
+                struct ecc_stat sm_lrf_double_err_count;
+                struct ecc_stat sm_shm_sec_count;
+                struct ecc_stat sm_shm_sed_count;
+                struct ecc_stat sm_shm_ded_count;
+                struct ecc_stat tex_total_sec_pipe0_count;
+                struct ecc_stat tex_total_ded_pipe0_count;
+                struct ecc_stat tex_unique_sec_pipe0_count;
+                struct ecc_stat tex_unique_ded_pipe0_count;
+                struct ecc_stat tex_total_sec_pipe1_count;
+                struct ecc_stat tex_total_ded_pipe1_count;
+                struct ecc_stat tex_unique_sec_pipe1_count;
+                struct ecc_stat tex_unique_ded_pipe1_count;
+                struct ecc_stat l2_sec_count;
+                struct ecc_stat l2_ded_count;
+        } ecc_stats;
+        u32 fecs_feature_override_ecc_val;
+        int cilp_preempt_pending_chid;
+};
+struct gr_ctx_desc_t18x {
+        struct mem_desc preempt_ctxsw_buffer;
+        struct mem_desc spill_ctxsw_buffer;
+        struct mem_desc betacb_ctxsw_buffer;
+        struct mem_desc pagepool_ctxsw_buffer;
+        u32 ctx_id;
+        bool ctx_id_valid;
+        bool cilp_preempt_pending;
+};
+#endif

diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h new file mode 100644 index 00000000..5338789f --- /dev/null +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h
@@ -0,0 +1,103 @@
	1	/*
	2	* GP10B GPU GR
	3	*
	4	* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*/
	15
	16	#ifndef _NVGPU_GR_GP10B_H_
	17	#define _NVGPU_GR_GP10B_H_
	18
	19	#include <linux/version.h>
	20
	21	struct gpu_ops;
	22
	23	enum {
	24	PASCAL_CHANNEL_GPFIFO_A = 0xC06F,
	25	PASCAL_A = 0xC097,
	26	PASCAL_COMPUTE_A = 0xC0C0,
	27	PASCAL_DMA_COPY_A = 0xC0B5,
	28	PASCAL_DMA_COPY_B = 0xC1B5,
	29	};
	30
	31	#define NVC097_SET_GO_IDLE_TIMEOUT 0x022c
	32	#define NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc
	33	#define NVC097_SET_COALESCE_BUFFER_SIZE 0x1028
	34	#define NVC097_SET_CIRCULAR_BUFFER_SIZE 0x1280
	35	#define NVC097_SET_SHADER_EXCEPTIONS 0x1528
	36	#define NVC0C0_SET_SHADER_EXCEPTIONS 0x1528
	37
	38	void gp10b_init_gr(struct gpu_ops *ops);
	39	int gr_gp10b_init_fs_state(struct gk20a *g);
	40	int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size,
	41	struct mem_desc *mem);
	42	void gr_gp10b_create_sysfs(struct device *dev);
	43
	44	struct ecc_stat {
	45	char **names;
	46	u32 *counters;
	47	struct hlist_node hash_node;
	48	};
	49
	50	struct gr_t18x {
	51	struct {
	52	u32 preempt_image_size;
	53	#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
	54	u32 force_preemption_gfxp;
	55	u32 force_preemption_cilp;
	56	u32 dump_ctxsw_stats_on_channel_close;
	57	#else
	58	bool force_preemption_gfxp;
	59	bool force_preemption_cilp;
	60	bool dump_ctxsw_stats_on_channel_close;
	61	#endif
	62	struct dentry *debugfs_force_preemption_cilp;
	63	struct dentry *debugfs_force_preemption_gfxp;
	64	struct dentry *debugfs_dump_ctxsw_stats;
	65	} ctx_vars;
	66
	67	struct {
	68	struct ecc_stat sm_lrf_single_err_count;
	69	struct ecc_stat sm_lrf_double_err_count;
	70
	71	struct ecc_stat sm_shm_sec_count;
	72	struct ecc_stat sm_shm_sed_count;
	73	struct ecc_stat sm_shm_ded_count;
	74
	75	struct ecc_stat tex_total_sec_pipe0_count;
	76	struct ecc_stat tex_total_ded_pipe0_count;
	77	struct ecc_stat tex_unique_sec_pipe0_count;
	78	struct ecc_stat tex_unique_ded_pipe0_count;
	79	struct ecc_stat tex_total_sec_pipe1_count;
	80	struct ecc_stat tex_total_ded_pipe1_count;
	81	struct ecc_stat tex_unique_sec_pipe1_count;
	82	struct ecc_stat tex_unique_ded_pipe1_count;
	83
	84	struct ecc_stat l2_sec_count;
	85	struct ecc_stat l2_ded_count;
	86	} ecc_stats;
	87
	88	u32 fecs_feature_override_ecc_val;
	89
	90	int cilp_preempt_pending_chid;
	91	};
	92
	93	struct gr_ctx_desc_t18x {
	94	struct mem_desc preempt_ctxsw_buffer;
	95	struct mem_desc spill_ctxsw_buffer;
	96	struct mem_desc betacb_ctxsw_buffer;
	97	struct mem_desc pagepool_ctxsw_buffer;
	98	u32 ctx_id;
	99	bool ctx_id_valid;
	100	bool cilp_preempt_pending;
	101	};
	102
	103	#endif