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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 1a50d29a..d61ac5bb 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -15,6 +15,7 @@
15 15
16#include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */ 16#include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/tegra-fuse.h>
18 19
19#include "gk20a/gr_gk20a.h" 20#include "gk20a/gr_gk20a.h"
20 21
@@ -1006,6 +1007,19 @@ static void gr_gp10b_init_cyclestats(struct gk20a *g)
1006#endif 1007#endif
1007} 1008}
1008 1009
1010static void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
1011{
1012 tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0);
1013 tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0);
1014
1015 if (g->gr.gpc_tpc_mask[gpc_index] == 0x1)
1016 tegra_fuse_writel(0x2, FUSE_OPT_GPU_TPC0_DISABLE_0);
1017 else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2)
1018 tegra_fuse_writel(0x1, FUSE_OPT_GPU_TPC0_DISABLE_0);
1019 else
1020 tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);
1021}
1022
1009void gp10b_init_gr(struct gpu_ops *gops) 1023void gp10b_init_gr(struct gpu_ops *gops)
1010{ 1024{
1011 gm20b_init_gr(gops); 1025 gm20b_init_gr(gops);
@@ -1034,4 +1048,5 @@ void gp10b_init_gr(struct gpu_ops *gops)
1034 gops->gr.dump_gr_regs = gr_gp10b_dump_gr_status_regs; 1048 gops->gr.dump_gr_regs = gr_gp10b_dump_gr_status_regs;
1035 gops->gr.wait_empty = gr_gp10b_wait_empty; 1049 gops->gr.wait_empty = gr_gp10b_wait_empty;
1036 gops->gr.init_cyclestats = gr_gp10b_init_cyclestats; 1050 gops->gr.init_cyclestats = gr_gp10b_init_cyclestats;
1051 gops->gr.set_gpc_tpc_mask = gr_gp10b_set_gpc_tpc_mask;
1037} 1052}