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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 984241db..eb6ee70f 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1891,21 +1891,14 @@ static int gr_gp10b_handle_fecs_error(struct gk20a *g,
1891 } 1891 }
1892 1892
1893 if (gk20a_gr_sm_debugger_attached(g)) { 1893 if (gk20a_gr_sm_debugger_attached(g)) {
1894 gk20a_dbg_gpu_post_events(ch);
1895
1894 if (gk20a_is_channel_marked_as_tsg(ch)) { 1896 if (gk20a_is_channel_marked_as_tsg(ch)) {
1895 struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; 1897 struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
1896 struct channel_gk20a *__ch;
1897
1898 mutex_lock(&tsg->ch_list_lock);
1899 list_for_each_entry(__ch, &tsg->ch_list, ch_entry) {
1900 gk20a_dbg_gpu_post_events(__ch);
1901 }
1902 mutex_unlock(&tsg->ch_list_lock);
1903 1898
1904 gk20a_tsg_event_id_post_event(tsg, 1899 gk20a_tsg_event_id_post_event(tsg,
1905 NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE); 1900 NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE);
1906 } else { 1901 } else {
1907 gk20a_dbg_gpu_post_events(ch);
1908
1909 gk20a_channel_event_id_post_event(ch, 1902 gk20a_channel_event_id_post_event(ch,
1910 NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE); 1903 NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE);
1911 } 1904 }