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path: root/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 205d2c97..5db65175 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -2061,18 +2061,21 @@ static int gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
2061 if (gk20a_mem_begin(g, mem)) 2061 if (gk20a_mem_begin(g, mem))
2062 return -ENOMEM; 2062 return -ENOMEM;
2063 2063
2064 g->ops.fifo.disable_channel(ch); 2064 err = gk20a_disable_channel_tsg(g, ch);
2065 err = g->ops.fifo.preempt_channel(g, ch->hw_chid);
2066 if (err) 2065 if (err)
2067 goto unmap_ctx; 2066 goto unmap_ctx;
2068 2067
2068 err = gk20a_fifo_preempt(g, ch);
2069 if (err)
2070 goto enable_ch;
2071
2069 if (g->ops.gr.update_ctxsw_preemption_mode) { 2072 if (g->ops.gr.update_ctxsw_preemption_mode) {
2070 g->ops.gr.update_ctxsw_preemption_mode(ch->g, ch_ctx, mem); 2073 g->ops.gr.update_ctxsw_preemption_mode(ch->g, ch_ctx, mem);
2071 g->ops.gr.commit_global_cb_manager(g, ch, true); 2074 g->ops.gr.commit_global_cb_manager(g, ch, true);
2072 } 2075 }
2073 2076
2074 g->ops.fifo.enable_channel(ch); 2077enable_ch:
2075 2078 gk20a_enable_channel_tsg(g, ch);
2076unmap_ctx: 2079unmap_ctx:
2077 gk20a_mem_end(g, mem); 2080 gk20a_mem_end(g, mem);
2078 2081