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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 91adf20c..6ed91bb1 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1523,8 +1523,21 @@ static int gr_gp10b_handle_fecs_error(struct gk20a *g,
1523 1523
1524 if (gk20a_gr_sm_debugger_attached(g)) { 1524 if (gk20a_gr_sm_debugger_attached(g)) {
1525 gk20a_err(dev_from_gk20a(g), "CILP: posting usermode event"); 1525 gk20a_err(dev_from_gk20a(g), "CILP: posting usermode event");
1526 gk20a_dbg_gpu_post_events(ch); 1526
1527 gk20a_channel_post_event(ch); 1527 if (gk20a_is_channel_marked_as_tsg(ch)) {
1528 struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
1529 struct channel_gk20a *__ch;
1530
1531 mutex_lock(&tsg->ch_list_lock);
1532 list_for_each_entry(__ch, &tsg->ch_list, ch_entry) {
1533 gk20a_dbg_gpu_post_events(__ch);
1534 gk20a_channel_post_event(__ch);
1535 }
1536 mutex_unlock(&tsg->ch_list_lock);
1537 } else {
1538 gk20a_dbg_gpu_post_events(ch);
1539 gk20a_channel_post_event(ch);
1540 }
1528 } 1541 }
1529 1542
1530 gk20a_channel_put(ch); 1543 gk20a_channel_put(ch);