1 files changed, 12 insertions, 14 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/gp10b.c b/drivers/gpu/nvgpu/gp10b/gp10b.c
index 51dc4301..7991944c 100644
--- a/drivers/gpu/nvgpu/gp10b/gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gp10b.c
@@ -1,7 +1,7 @@
 /*
  * GP10B Graphics
  *
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -28,15 +28,13 @@
 
 #include "gp10b.h"
 
-#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
 #include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
 
 static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
 {
-        u32 opt_ecc_en = gk20a_readl(g, fuse_opt_ecc_en_r());
-        u32 opt_feature_fuses_override_disable =
-                        gk20a_readl(g,
-                                fuse_opt_feature_fuses_override_disable_r());
+        bool opt_ecc_en = g->ops.fuse.is_opt_ecc_enable(g);
+        bool opt_feature_fuses_override_disable =
+                        g->ops.fuse.is_opt_feature_override_disable(g);
         u32 fecs_feature_override_ecc =
                                 gk20a_readl(g,
                                         gr_fecs_feature_override_ecc_r());
@@ -51,9 +49,9 @@ static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
         } else {
                 /* SM LRF */
                 if (gr_fecs_feature_override_ecc_sm_lrf_override_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                         if (gr_fecs_feature_override_ecc_sm_lrf_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                                 __nvgpu_set_enabled(g,
                                                 NVGPU_ECC_ENABLED_SM_LRF, true);
                         }
@@ -66,9 +64,9 @@ static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
 
                 /* SM SHM */
                 if (gr_fecs_feature_override_ecc_sm_shm_override_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                         if (gr_fecs_feature_override_ecc_sm_shm_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                                 __nvgpu_set_enabled(g,
                                                 NVGPU_ECC_ENABLED_SM_SHM, true);
                         }
@@ -81,9 +79,9 @@ static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
 
                 /* TEX */
                 if (gr_fecs_feature_override_ecc_tex_override_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                         if (gr_fecs_feature_override_ecc_tex_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                                 __nvgpu_set_enabled(g,
                                                 NVGPU_ECC_ENABLED_TEX, true);
                         }
@@ -96,9 +94,9 @@ static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
 
                 /* LTC */
                 if (gr_fecs_feature_override_ecc_ltc_override_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                         if (gr_fecs_feature_override_ecc_ltc_v(
-                                                fecs_feature_override_ecc)) {
+                                        fecs_feature_override_ecc) == 1U) {
                                 __nvgpu_set_enabled(g,
                                                 NVGPU_ECC_ENABLED_LTC, true);
                         }