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Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fifo_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/gp10b/fifo_gp10b.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.h b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.h
index 20918483..2ab11eca 100644
--- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B Fifo 2 * GP10B Fifo
3 * 3 *
4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -42,6 +42,8 @@ void gp10b_device_info_data_parse(struct gk20a *g, u32 table_entry,
42void gp10b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f); 42void gp10b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f);
43void gp10b_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id, 43void gp10b_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id,
44 struct mmu_fault_info *mmfault); 44 struct mmu_fault_info *mmfault);
45void gp10b_fifo_get_mmu_fault_desc(struct mmu_fault_info *mmfault);
46void gp10b_fifo_get_mmu_fault_client_desc(struct mmu_fault_info *mmfault);
45int channel_gp10b_commit_userd(struct channel_gk20a *c); 47int channel_gp10b_commit_userd(struct channel_gk20a *c);
46 48
47#endif 49#endif