diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp10b/fifo_gp10b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 56 |
1 files changed, 55 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index 1436a260..66f3012f 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B fifo | 2 | * GP10B fifo |
3 | * | 3 | * |
4 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -317,3 +317,57 @@ void gp10b_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id, | |||
317 | /* note: inst_ptr is a 40b phys addr. */ | 317 | /* note: inst_ptr is a 40b phys addr. */ |
318 | mmfault->inst_ptr <<= fifo_intr_mmu_fault_inst_ptr_align_shift_v(); | 318 | mmfault->inst_ptr <<= fifo_intr_mmu_fault_inst_ptr_align_shift_v(); |
319 | } | 319 | } |
320 | /* fault info/descriptions */ | ||
321 | static const char * const gp10b_fault_type_descs[] = { | ||
322 | "pde", /*fifo_intr_mmu_fault_info_type_pde_v() == 0 */ | ||
323 | "pde size", | ||
324 | "pte", | ||
325 | "va limit viol", | ||
326 | "unbound inst", | ||
327 | "priv viol", | ||
328 | "ro viol", | ||
329 | "wo viol", | ||
330 | "pitch mask", | ||
331 | "work creation", | ||
332 | "bad aperture", | ||
333 | "compression failure", | ||
334 | "bad kind", | ||
335 | "region viol", | ||
336 | "dual ptes", | ||
337 | "poisoned", | ||
338 | "atomic violation", | ||
339 | }; | ||
340 | |||
341 | static const char * const gp10b_hub_client_descs[] = { | ||
342 | "vip", "ce0", "ce1", "dniso", "fe", "fecs", "host", "host cpu", | ||
343 | "host cpu nb", "iso", "mmu", "mspdec", "msppp", "msvld", | ||
344 | "niso", "p2p", "pd", "perf", "pmu", "raster twod", "scc", | ||
345 | "scc nb", "sec", "ssync", "gr copy", "xv", "mmu nb", | ||
346 | "msenc", "d falcon", "sked", "a falcon", "n/a", | ||
347 | "hsce0", "hsce1", "hsce2", "hsce3", "hsce4", "hsce5", | ||
348 | "hsce6", "hsce7", "hsce8", "hsce9", "hshub", | ||
349 | "ptp x0", "ptp x1", "ptp x2", "ptp x3", "ptp x4", | ||
350 | "ptp x5", "ptp x6", "ptp x7", "vpr scrubber0", "vpr scrubber1", | ||
351 | }; | ||
352 | |||
353 | /* fill in mmu fault desc */ | ||
354 | void gp10b_fifo_get_mmu_fault_desc(struct mmu_fault_info *mmfault) | ||
355 | { | ||
356 | if (mmfault->fault_type >= ARRAY_SIZE(gp10b_fault_type_descs)) | ||
357 | WARN_ON(mmfault->fault_type >= | ||
358 | ARRAY_SIZE(gp10b_fault_type_descs)); | ||
359 | else | ||
360 | mmfault->fault_type_desc = | ||
361 | gp10b_fault_type_descs[mmfault->fault_type]; | ||
362 | } | ||
363 | |||
364 | /* fill in mmu fault client description */ | ||
365 | void gp10b_fifo_get_mmu_fault_client_desc(struct mmu_fault_info *mmfault) | ||
366 | { | ||
367 | if (mmfault->client_id >= ARRAY_SIZE(gp10b_hub_client_descs)) | ||
368 | WARN_ON(mmfault->client_id >= | ||
369 | ARRAY_SIZE(gp10b_hub_client_descs)); | ||
370 | else | ||
371 | mmfault->client_id_desc = | ||
372 | gp10b_hub_client_descs[mmfault->client_id]; | ||
373 | } | ||