diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/gr_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/gr_gp106.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.h | 4 |
5 files changed, 18 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.c b/drivers/gpu/nvgpu/gp106/gr_gp106.c index bf266b66..76e5cf89 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.c | |||
@@ -234,9 +234,11 @@ fail: | |||
234 | return err; | 234 | return err; |
235 | } | 235 | } |
236 | 236 | ||
237 | void gp106_init_gr(struct gpu_ops *gops) | 237 | void gp106_init_gr(struct gk20a *g) |
238 | { | 238 | { |
239 | gp10b_init_gr(gops); | 239 | struct gpu_ops *gops = &g->ops; |
240 | |||
241 | gp10b_init_gr(g); | ||
240 | gops->gr.is_valid_class = gr_gp106_is_valid_class; | 242 | gops->gr.is_valid_class = gr_gp106_is_valid_class; |
241 | gops->gr.pagepool_default_size = gr_gp106_pagepool_default_size; | 243 | gops->gr.pagepool_default_size = gr_gp106_pagepool_default_size; |
242 | gops->gr.handle_sw_method = gr_gp106_handle_sw_method; | 244 | gops->gr.handle_sw_method = gr_gp106_handle_sw_method; |
diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.h b/drivers/gpu/nvgpu/gp106/gr_gp106.h index 4fe22ee9..3f49aac6 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.h +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 GPU GR | 2 | * GP106 GPU GR |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -16,11 +16,13 @@ | |||
16 | #ifndef _NVGPU_GR_GP106_H_ | 16 | #ifndef _NVGPU_GR_GP106_H_ |
17 | #define _NVGPU_GR_GP106_H_ | 17 | #define _NVGPU_GR_GP106_H_ |
18 | 18 | ||
19 | struct gk20a; | ||
20 | |||
19 | enum { | 21 | enum { |
20 | PASCAL_B = 0xC197, | 22 | PASCAL_B = 0xC197, |
21 | PASCAL_COMPUTE_B = 0xC1C0, | 23 | PASCAL_COMPUTE_B = 0xC1C0, |
22 | }; | 24 | }; |
23 | 25 | ||
24 | void gp106_init_gr(struct gpu_ops *gops); | 26 | void gp106_init_gr(struct gk20a *g); |
25 | 27 | ||
26 | #endif | 28 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 80117ede..49c4b358 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -416,18 +416,18 @@ int gp106_init_hal(struct gk20a *g) | |||
416 | gp106_ops.chip_init_gpu_characteristics; | 416 | gp106_ops.chip_init_gpu_characteristics; |
417 | gops->bios_init = gp106_ops.bios_init; | 417 | gops->bios_init = gp106_ops.bios_init; |
418 | 418 | ||
419 | gops->privsecurity = 1; | 419 | __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); |
420 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); | 420 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); |
421 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); | 421 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); |
422 | 422 | ||
423 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; | 423 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; |
424 | gp106_init_gr(gops); | 424 | gp106_init_gr(g); |
425 | gp10b_init_fecs_trace_ops(gops); | 425 | gp10b_init_fecs_trace_ops(gops); |
426 | gp106_init_fb(gops); | 426 | gp106_init_fb(gops); |
427 | gp10b_init_ce(gops); | 427 | gp10b_init_ce(gops); |
428 | gp106_init_gr_ctx(gops); | 428 | gp106_init_gr_ctx(gops); |
429 | gp106_init_mm(gops); | 429 | gp106_init_mm(gops); |
430 | gp106_init_pmu_ops(gops); | 430 | gp106_init_pmu_ops(g); |
431 | gp106_init_clk_ops(gops); | 431 | gp106_init_clk_ops(gops); |
432 | gp106_init_clk_arb_ops(gops); | 432 | gp106_init_clk_arb_ops(gops); |
433 | gp106_init_regops(gops); | 433 | gp106_init_regops(gops); |
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index a09aa30b..a9fb794d 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c | |||
@@ -12,6 +12,7 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <nvgpu/pmu.h> | 14 | #include <nvgpu/pmu.h> |
15 | #include <nvgpu/enabled.h> | ||
15 | 16 | ||
16 | #include "gk20a/gk20a.h" | 17 | #include "gk20a/gk20a.h" |
17 | #include "gk20a/pmu_gk20a.h" | 18 | #include "gk20a/pmu_gk20a.h" |
@@ -289,11 +290,11 @@ static int gp106_load_falcon_ucode(struct gk20a *g, u32 falconidmask) | |||
289 | return 0; | 290 | return 0; |
290 | } | 291 | } |
291 | 292 | ||
292 | void gp106_init_pmu_ops(struct gpu_ops *gops) | 293 | void gp106_init_pmu_ops(struct gk20a *g) |
293 | { | 294 | { |
295 | struct gpu_ops *gops = &g->ops; | ||
294 | gk20a_dbg_fn(""); | 296 | gk20a_dbg_fn(""); |
295 | 297 | if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { | |
296 | if (gops->privsecurity) { | ||
297 | gp106_init_secure_pmu(gops); | 298 | gp106_init_secure_pmu(gops); |
298 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; | 299 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; |
299 | gops->pmu.load_lsfalcon_ucode = gp106_load_falcon_ucode; | 300 | gops->pmu.load_lsfalcon_ucode = gp106_load_falcon_ucode; |
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_gp106.h index 5f399b89..68a00bb5 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.h +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.h | |||
@@ -17,7 +17,9 @@ | |||
17 | #define gp106_dbg_pmu(fmt, arg...) \ | 17 | #define gp106_dbg_pmu(fmt, arg...) \ |
18 | gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) | 18 | gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) |
19 | 19 | ||
20 | void gp106_init_pmu_ops(struct gpu_ops *gops); | 20 | struct gk20a; |
21 | |||
22 | void gp106_init_pmu_ops(struct gk20a *g); | ||
21 | void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, | 23 | void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, |
22 | struct pmu_pg_stats_data *pg_stat_data); | 24 | struct pmu_pg_stats_data *pg_stat_data); |
23 | bool gp106_pmu_is_engine_in_reset(struct gk20a *g); | 25 | bool gp106_pmu_is_engine_in_reset(struct gk20a *g); |