diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.h | 141 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.c | 2 |
3 files changed, 4 insertions, 145 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c index 847a0b00..a4dfd07f 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c | |||
@@ -19,9 +19,13 @@ | |||
19 | #include <linux/dma-mapping.h> | 19 | #include <linux/dma-mapping.h> |
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | 21 | ||
22 | #include <nvgpu/nvgpu_common.h> | ||
23 | #include <nvgpu/acr/nvgpu_acr.h> | ||
24 | |||
22 | #include "gk20a/gk20a.h" | 25 | #include "gk20a/gk20a.h" |
23 | #include "gk20a/pmu_gk20a.h" | 26 | #include "gk20a/pmu_gk20a.h" |
24 | 27 | ||
28 | #include "gm20b/mm_gm20b.h" | ||
25 | #include "gm20b/acr_gm20b.h" | 29 | #include "gm20b/acr_gm20b.h" |
26 | #include "gp106/acr_gp106.h" | 30 | #include "gp106/acr_gp106.h" |
27 | #include "gp106/pmu_gp106.h" | 31 | #include "gp106/pmu_gp106.h" |
@@ -29,8 +33,6 @@ | |||
29 | #include "sec2_gp106.h" | 33 | #include "sec2_gp106.h" |
30 | #include "nvgpu_gpuid_t18x.h" | 34 | #include "nvgpu_gpuid_t18x.h" |
31 | 35 | ||
32 | #include <nvgpu/nvgpu_common.h> | ||
33 | |||
34 | #include <nvgpu/hw/gp106/hw_psec_gp106.h> | 36 | #include <nvgpu/hw/gp106/hw_psec_gp106.h> |
35 | #include <nvgpu/hw/gp106/hw_pwr_gp106.h> | 37 | #include <nvgpu/hw/gp106/hw_pwr_gp106.h> |
36 | 38 | ||
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.h b/drivers/gpu/nvgpu/gp106/acr_gp106.h index dee01f6b..34d2b117 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.h +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.h | |||
@@ -14,152 +14,11 @@ | |||
14 | #ifndef __ACR_GP106_H_ | 14 | #ifndef __ACR_GP106_H_ |
15 | #define __ACR_GP106_H_ | 15 | #define __ACR_GP106_H_ |
16 | 16 | ||
17 | #include "gm20b/acr_gm20b.h" | ||
18 | |||
19 | #define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin" | 17 | #define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin" |
20 | #define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin" | 18 | #define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin" |
21 | #define GP104_FECS_UCODE_SIG "gp104/fecs_sig.bin" | 19 | #define GP104_FECS_UCODE_SIG "gp104/fecs_sig.bin" |
22 | #define GP104_GPCCS_UCODE_SIG "gp104/gpccs_sig.bin" | 20 | #define GP104_GPCCS_UCODE_SIG "gp104/gpccs_sig.bin" |
23 | 21 | ||
24 | struct loader_config_v1 { | ||
25 | u32 reserved; | ||
26 | u32 dma_idx; | ||
27 | struct falc_u64 code_dma_base; | ||
28 | u32 code_size_total; | ||
29 | u32 code_size_to_load; | ||
30 | u32 code_entry_point; | ||
31 | struct falc_u64 data_dma_base; | ||
32 | u32 data_size; | ||
33 | struct falc_u64 overlay_dma_base; | ||
34 | u32 argc; | ||
35 | u32 argv; | ||
36 | }; | ||
37 | |||
38 | struct flcn_bl_dmem_desc_v1 { | ||
39 | u32 reserved[4]; /*Should be the first element..*/ | ||
40 | u32 signature[4]; /*Should be the first element..*/ | ||
41 | u32 ctx_dma; | ||
42 | struct falc_u64 code_dma_base; | ||
43 | u32 non_sec_code_off; | ||
44 | u32 non_sec_code_size; | ||
45 | u32 sec_code_off; | ||
46 | u32 sec_code_size; | ||
47 | u32 code_entry_point; | ||
48 | struct falc_u64 data_dma_base; | ||
49 | u32 data_size; | ||
50 | u32 argc; | ||
51 | u32 argv; | ||
52 | }; | ||
53 | |||
54 | /*! | ||
55 | * Union of all supported structures used by bootloaders. | ||
56 | */ | ||
57 | union flcn_bl_generic_desc_v1 { | ||
58 | struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1; | ||
59 | struct loader_config_v1 loader_cfg_v1; | ||
60 | }; | ||
61 | |||
62 | struct lsf_ucode_desc_v1 { | ||
63 | u8 prd_keys[2][16]; | ||
64 | u8 dbg_keys[2][16]; | ||
65 | u32 b_prd_present; | ||
66 | u32 b_dbg_present; | ||
67 | u32 falcon_id; | ||
68 | u32 bsupports_versioning; | ||
69 | u32 version; | ||
70 | u32 dep_map_count; | ||
71 | u8 dep_map[LSF_FALCON_ID_END * 2 * 4]; | ||
72 | u8 kdf[16]; | ||
73 | }; | ||
74 | |||
75 | struct lsf_wpr_header_v1 { | ||
76 | u32 falcon_id; | ||
77 | u32 lsb_offset; | ||
78 | u32 bootstrap_owner; | ||
79 | u32 lazy_bootstrap; | ||
80 | u32 bin_version; | ||
81 | u32 status; | ||
82 | }; | ||
83 | |||
84 | struct lsf_lsb_header_v1 { | ||
85 | struct lsf_ucode_desc_v1 signature; | ||
86 | u32 ucode_off; | ||
87 | u32 ucode_size; | ||
88 | u32 data_size; | ||
89 | u32 bl_code_size; | ||
90 | u32 bl_imem_off; | ||
91 | u32 bl_data_off; | ||
92 | u32 bl_data_size; | ||
93 | u32 app_code_off; | ||
94 | u32 app_code_size; | ||
95 | u32 app_data_off; | ||
96 | u32 app_data_size; | ||
97 | u32 flags; | ||
98 | }; | ||
99 | |||
100 | struct flcn_ucode_img_v1 { | ||
101 | u32 *header; /*only some falcons have header*/ | ||
102 | u32 *data; | ||
103 | struct pmu_ucode_desc_v1 *desc; /*only some falcons have descriptor*/ | ||
104 | u32 data_size; | ||
105 | void *fw_ver; /*NV2080_CTRL_GPU_GET_FIRMWARE_VERSION_PARAMS struct*/ | ||
106 | u8 load_entire_os_data; /* load the whole osData section at boot time.*/ | ||
107 | struct lsf_ucode_desc_v1 *lsf_desc; /* NULL if not a light secure falcon.*/ | ||
108 | u8 free_res_allocs;/*True if there a resources to freed by the client.*/ | ||
109 | u32 flcn_inst; | ||
110 | }; | ||
111 | |||
112 | struct lsfm_managed_ucode_img_v2 { | ||
113 | struct lsfm_managed_ucode_img_v2 *next; | ||
114 | struct lsf_wpr_header_v1 wpr_header; | ||
115 | struct lsf_lsb_header_v1 lsb_header; | ||
116 | union flcn_bl_generic_desc_v1 bl_gen_desc; | ||
117 | u32 bl_gen_desc_size; | ||
118 | u32 full_ucode_size; | ||
119 | struct flcn_ucode_img_v1 ucode_img; | ||
120 | }; | ||
121 | struct ls_flcn_mgr_v1 { | ||
122 | u16 managed_flcn_cnt; | ||
123 | u32 wpr_size; | ||
124 | u32 disable_mask; | ||
125 | struct lsfm_managed_ucode_img_v2 *ucode_img_list; | ||
126 | void *wpr_client_req_state;/*PACR_CLIENT_REQUEST_STATE originally*/ | ||
127 | }; | ||
128 | |||
129 | struct flcn_acr_region_prop_v1 { | ||
130 | u32 start_addr; | ||
131 | u32 end_addr; | ||
132 | u32 region_id; | ||
133 | u32 read_mask; | ||
134 | u32 write_mask; | ||
135 | u32 client_mask; | ||
136 | u32 shadowmMem_startaddress; | ||
137 | }; | ||
138 | |||
139 | /*! | ||
140 | * no_regions - Number of regions used. | ||
141 | * region_props - Region properties | ||
142 | */ | ||
143 | struct flcn_acr_regions_v1 { | ||
144 | u32 no_regions; | ||
145 | struct flcn_acr_region_prop_v1 region_props[T210_FLCN_ACR_MAX_REGIONS]; | ||
146 | }; | ||
147 | |||
148 | struct flcn_acr_desc_v1 { | ||
149 | union { | ||
150 | u32 reserved_dmem[(LSF_BOOTSTRAP_OWNER_RESERVED_DMEM_SIZE/4)]; | ||
151 | } ucode_reserved_space; | ||
152 | u32 signatures[4]; | ||
153 | /*Always 1st*/ | ||
154 | u32 wpr_region_id; | ||
155 | u32 wpr_offset; | ||
156 | u32 mmu_mem_range; | ||
157 | struct flcn_acr_regions_v1 regions; | ||
158 | u32 nonwpr_ucode_blob_size; | ||
159 | u64 nonwpr_ucode_blob_start; | ||
160 | u32 dummy[4]; //ACR_BSI_VPR_DESC | ||
161 | }; | ||
162 | |||
163 | void gp106_init_secure_pmu(struct gpu_ops *gops); | 22 | void gp106_init_secure_pmu(struct gpu_ops *gops); |
164 | 23 | ||
165 | #endif /*__PMU_GP106_H_*/ | 24 | #endif /*__PMU_GP106_H_*/ |
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c index 51e76605..92f99165 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c | |||
@@ -22,10 +22,8 @@ | |||
22 | #include "gp10b/pmu_gp10b.h" | 22 | #include "gp10b/pmu_gp10b.h" |
23 | 23 | ||
24 | #include "gp106/pmu_gp106.h" | 24 | #include "gp106/pmu_gp106.h" |
25 | #include "gp106/acr_gp106.h" | ||
26 | 25 | ||
27 | #include "sec2_gp106.h" | 26 | #include "sec2_gp106.h" |
28 | #include "acr.h" | ||
29 | 27 | ||
30 | #include <nvgpu/hw/gp106/hw_mc_gp106.h> | 28 | #include <nvgpu/hw/gp106/hw_mc_gp106.h> |
31 | #include <nvgpu/hw/gp106/hw_pwr_gp106.h> | 29 | #include <nvgpu/hw/gp106/hw_pwr_gp106.h> |