diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp106')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/bios_gp106.c | 121 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/bios_gp106.h | 31 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hw_fb_gp106.h | 72 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hw_gc6_gp106.h | 56 |
5 files changed, 282 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c new file mode 100644 index 00000000..8be4314d --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c | |||
@@ -0,0 +1,121 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include "gk20a/gk20a.h" | ||
15 | #include "gm206/bios_gm206.h" | ||
16 | #include "bios_gp106.h" | ||
17 | #include "hw_gc6_gp106.h" | ||
18 | |||
19 | static void gp106_init_xmemsel_zm_nv_reg_array(struct gk20a *g, bool *condition, | ||
20 | u32 reg, u32 stride, u32 count, u32 data_table_offset) | ||
21 | { | ||
22 | u8 i; | ||
23 | u32 data, strap, index; | ||
24 | |||
25 | if (*condition) { | ||
26 | |||
27 | strap = gk20a_readl(g, gc6_sci_strap_r()) & 0xf; | ||
28 | |||
29 | index = g->bios.mem_strap_xlat_tbl_ptr ? | ||
30 | gm206_bios_read_u8(g, g->bios.mem_strap_xlat_tbl_ptr + | ||
31 | strap) : strap; | ||
32 | |||
33 | for (i = 0; i < count; i++) { | ||
34 | data = gm206_bios_read_u32(g, data_table_offset + ((i * | ||
35 | g->bios.mem_strap_data_count + index) * | ||
36 | sizeof(u32))); | ||
37 | gk20a_writel(g, reg, data); | ||
38 | reg += stride; | ||
39 | } | ||
40 | } | ||
41 | } | ||
42 | |||
43 | static void gp106_init_condition(struct gk20a *g, bool *condition, | ||
44 | u32 condition_id) | ||
45 | { | ||
46 | struct condition_entry entry; | ||
47 | |||
48 | entry.cond_addr = gm206_bios_read_u32(g, g->bios.condition_table_ptr + | ||
49 | sizeof(entry)*condition_id); | ||
50 | entry.cond_mask = gm206_bios_read_u32(g, g->bios.condition_table_ptr + | ||
51 | sizeof(entry)*condition_id + 4); | ||
52 | entry.cond_compare = gm206_bios_read_u32(g, g->bios.condition_table_ptr + | ||
53 | sizeof(entry)*condition_id + 8); | ||
54 | |||
55 | if ((gk20a_readl(g, entry.cond_addr) & entry.cond_mask) | ||
56 | != entry.cond_compare) { | ||
57 | *condition = false; | ||
58 | } | ||
59 | } | ||
60 | |||
61 | static int gp106_execute_script(struct gk20a *g, u32 offset) | ||
62 | { | ||
63 | u8 opcode; | ||
64 | u32 ip; | ||
65 | u32 operand[8]; | ||
66 | bool condition, end; | ||
67 | int status = 0; | ||
68 | |||
69 | ip = offset; | ||
70 | condition = true; | ||
71 | end = false; | ||
72 | |||
73 | while (!end) { | ||
74 | |||
75 | opcode = gm206_bios_read_u8(g, ip++); | ||
76 | |||
77 | switch (opcode) { | ||
78 | |||
79 | case INIT_XMEMSEL_ZM_NV_REG_ARRAY: | ||
80 | operand[0] = gm206_bios_read_u32(g, ip); | ||
81 | operand[1] = gm206_bios_read_u8(g, ip+4); | ||
82 | operand[2] = gm206_bios_read_u8(g, ip+5); | ||
83 | ip += 6; | ||
84 | |||
85 | gp106_init_xmemsel_zm_nv_reg_array(g, &condition, | ||
86 | operand[0], operand[1], operand[2], ip); | ||
87 | ip += operand[2] * sizeof(u32) * | ||
88 | g->bios.mem_strap_data_count; | ||
89 | break; | ||
90 | |||
91 | case INIT_CONDITION: | ||
92 | operand[0] = gm206_bios_read_u8(g, ip); | ||
93 | ip++; | ||
94 | |||
95 | gp106_init_condition(g, &condition, operand[0]); | ||
96 | break; | ||
97 | |||
98 | case INIT_RESUME: | ||
99 | condition = true; | ||
100 | break; | ||
101 | |||
102 | case INIT_DONE: | ||
103 | end = true; | ||
104 | break; | ||
105 | |||
106 | default: | ||
107 | gk20a_err(dev_from_gk20a(g), "opcode: 0x%02x", opcode); | ||
108 | end = true; | ||
109 | status = -EINVAL; | ||
110 | break; | ||
111 | } | ||
112 | } | ||
113 | |||
114 | return status; | ||
115 | } | ||
116 | |||
117 | void gp106_init_bios(struct gpu_ops *gops) | ||
118 | { | ||
119 | gm206_init_bios(gops); | ||
120 | gops->bios.execute_script = gp106_execute_script; | ||
121 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.h b/drivers/gpu/nvgpu/gp106/bios_gp106.h new file mode 100644 index 00000000..f47d11ca --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef NVGPU_BIOS_GP106_H | ||
15 | #define NVGPU_BIOS_GP106_H | ||
16 | |||
17 | struct gpu_ops; | ||
18 | |||
19 | #define INIT_DONE 0x71 | ||
20 | #define INIT_RESUME 0x72 | ||
21 | #define INIT_CONDITION 0x75 | ||
22 | #define INIT_XMEMSEL_ZM_NV_REG_ARRAY 0x8f | ||
23 | |||
24 | struct condition_entry { | ||
25 | u32 cond_addr; | ||
26 | u32 cond_mask; | ||
27 | u32 cond_compare; | ||
28 | } __packed; | ||
29 | |||
30 | void gp106_init_bios(struct gpu_ops *gops); | ||
31 | #endif | ||
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 2217dfea..89e0e1fd 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include "gp106/therm_gp106.h" | 31 | #include "gp106/therm_gp106.h" |
32 | #include "gp106/xve_gp106.h" | 32 | #include "gp106/xve_gp106.h" |
33 | 33 | ||
34 | #include "gm206/bios_gm206.h" | 34 | #include "gp106/bios_gp106.h" |
35 | 35 | ||
36 | #include "gm20b/gr_gm20b.h" | 36 | #include "gm20b/gr_gm20b.h" |
37 | #include "gm20b/fifo_gm20b.h" | 37 | #include "gm20b/fifo_gm20b.h" |
@@ -209,7 +209,7 @@ int gp106_init_hal(struct gk20a *g) | |||
209 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 209 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
210 | gk20a_init_css_ops(gops); | 210 | gk20a_init_css_ops(gops); |
211 | #endif | 211 | #endif |
212 | gm206_init_bios(gops); | 212 | gp106_init_bios(gops); |
213 | gp106_init_therm_ops(gops); | 213 | gp106_init_therm_ops(gops); |
214 | gp106_init_xve_ops(gops); | 214 | gp106_init_xve_ops(gops); |
215 | 215 | ||
diff --git a/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h b/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h index 1ab876cd..d76f78b9 100644 --- a/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h | |||
@@ -502,4 +502,76 @@ static inline u32 fb_mmu_local_memory_range_ecc_mode_v(u32 r) | |||
502 | { | 502 | { |
503 | return (r >> 30) & 0x1; | 503 | return (r >> 30) & 0x1; |
504 | } | 504 | } |
505 | static inline u32 fb_fbpa_fbio_delay_r(void) | ||
506 | { | ||
507 | return 0x9a065c; | ||
508 | } | ||
509 | static inline u32 fb_fbpa_fbio_delay_src_m(void) | ||
510 | { | ||
511 | return 0x7; | ||
512 | } | ||
513 | static inline u32 fb_fbpa_fbio_delay_src_v(u32 r) | ||
514 | { | ||
515 | return (r >> 0) & 0x7; | ||
516 | } | ||
517 | static inline u32 fb_fbpa_fbio_delay_src_f(u32 v) | ||
518 | { | ||
519 | return (v & 0x7) << 0; | ||
520 | } | ||
521 | static inline u32 fb_fbpa_fbio_delay_src_max_v(void) | ||
522 | { | ||
523 | return 2; | ||
524 | } | ||
525 | static inline u32 fb_fbpa_fbio_delay_priv_m(void) | ||
526 | { | ||
527 | return 0x7 << 4; | ||
528 | } | ||
529 | static inline u32 fb_fbpa_fbio_delay_priv_v(u32 r) | ||
530 | { | ||
531 | return (r >> 4) & 0x7; | ||
532 | } | ||
533 | static inline u32 fb_fbpa_fbio_delay_priv_f(u32 v) | ||
534 | { | ||
535 | return (v & 0x7) << 4; | ||
536 | } | ||
537 | static inline u32 fb_fbpa_fbio_delay_priv_max_v(void) | ||
538 | { | ||
539 | return 2; | ||
540 | } | ||
541 | static inline u32 fb_fbpa_fbio_cmd_delay_r(void) | ||
542 | { | ||
543 | return 0x9a08e0; | ||
544 | } | ||
545 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_src_m(void) | ||
546 | { | ||
547 | return 0x7; | ||
548 | } | ||
549 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_src_v(u32 r) | ||
550 | { | ||
551 | return (r >> 0) & 0x7; | ||
552 | } | ||
553 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_src_f(u32 v) | ||
554 | { | ||
555 | return (v & 0x7) << 0; | ||
556 | } | ||
557 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_src_max_v(void) | ||
558 | { | ||
559 | return 1; | ||
560 | } | ||
561 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_priv_m(void) | ||
562 | { | ||
563 | return 0x7 << 4; | ||
564 | } | ||
565 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_priv_v(u32 r) | ||
566 | { | ||
567 | return (r >> 4) & 0x7; | ||
568 | } | ||
569 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_priv_f(u32 v) | ||
570 | { | ||
571 | return (v & 0x7) << 4; | ||
572 | } | ||
573 | static inline u32 fb_fbpa_fbio_cmd_delay_cmd_priv_max_v(void) | ||
574 | { | ||
575 | return 1; | ||
576 | } | ||
505 | #endif | 577 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/hw_gc6_gp106.h b/drivers/gpu/nvgpu/gp106/hw_gc6_gp106.h new file mode 100644 index 00000000..25aca9b5 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/hw_gc6_gp106.h | |||
@@ -0,0 +1,56 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | /* | ||
17 | * Function naming determines intended use: | ||
18 | * | ||
19 | * <x>_r(void) : Returns the offset for register <x>. | ||
20 | * | ||
21 | * <x>_o(void) : Returns the offset for element <x>. | ||
22 | * | ||
23 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
24 | * | ||
25 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
26 | * | ||
27 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
28 | * and masked to place it at field <y> of register <x>. This value | ||
29 | * can be |'d with others to produce a full register value for | ||
30 | * register <x>. | ||
31 | * | ||
32 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
33 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
34 | * register <x>. | ||
35 | * | ||
36 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
37 | * to place it at field <y> of register <x>. This value can be |'d | ||
38 | * with others to produce a full register value for <x>. | ||
39 | * | ||
40 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
41 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
42 | * This value is suitable for direct comparison with other unshifted | ||
43 | * values appropriate for use in field <y> of register <x>. | ||
44 | * | ||
45 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
46 | * field <y> of register <x>. This value is suitable for direct | ||
47 | * comparison with unshifted values appropriate for use in field <y> | ||
48 | * of register <x>. | ||
49 | */ | ||
50 | #ifndef _hw_gc6_gp106_h_ | ||
51 | #define _hw_gc6_gp106_h_ | ||
52 | static inline u32 gc6_sci_strap_r(void) | ||
53 | { | ||
54 | return 0x00010ebb0; | ||
55 | } | ||
56 | #endif | ||