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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/xve_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/xve_gp106.h71
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diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.h b/drivers/gpu/nvgpu/gp106/xve_gp106.h
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1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __XVE_GP106_H__
24#define __XVE_GP106_H__
25
26#include "gk20a/gk20a.h"
27
28#include <nvgpu/log2.h>
29
30int gp106_init_xve_ops(struct gpu_ops *gops);
31
32/*
33 * Best guess for a reasonable timeout.
34 */
35#define GPU_XVE_TIMEOUT_MS 500
36
37/*
38 * Debugging for the speed change.
39 */
40enum xv_speed_change_steps {
41 PRE_CHANGE = 0,
42 DISABLE_ASPM,
43 DL_SAFE_MODE,
44 CHECK_LINK,
45 LINK_SETTINGS,
46 EXEC_CHANGE,
47 EXEC_VERIF,
48 CLEANUP
49};
50
51#define xv_dbg(fmt, args...) \
52 gk20a_dbg(gpu_dbg_xv, fmt, ##args)
53
54#define xv_sc_dbg(step, fmt, args...) \
55 xv_dbg("[%d] %15s | " fmt, step, __stringify(step), ##args)
56
57void xve_xve_writel_gp106(struct gk20a *g, u32 reg, u32 val);
58u32 xve_xve_readl_gp106(struct gk20a *g, u32 reg);
59void xve_reset_gpu_gp106(struct gk20a *g);
60int xve_get_speed_gp106(struct gk20a *g, u32 *xve_link_speed);
61void xve_disable_aspm_gp106(struct gk20a *g);
62int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed);
63void xve_available_speeds_gp106(struct gk20a *g, u32 *speed_mask);
64u32 xve_get_link_control_status(struct gk20a *g);
65#if defined(CONFIG_PCI_MSI)
66void xve_rearm_msi_gp106(struct gk20a *g);
67#endif
68void xve_enable_shadow_rom_gp106(struct gk20a *g);
69void xve_disable_shadow_rom_gp106(struct gk20a *g);
70
71#endif