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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/xve_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/xve_gp106.h99
1 files changed, 99 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.h b/drivers/gpu/nvgpu/gp106/xve_gp106.h
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1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __XVE_GP106_H__
18#define __XVE_GP106_H__
19
20#include "gk20a/gk20a.h"
21
22int gp106_init_xve_ops(struct gpu_ops *gops);
23
24/*
25 * Best guess for a reasonable timeout.
26 */
27#define GPU_XVE_TIMEOUT_MS 500
28
29/*
30 * For the available speeds bitmap.
31 */
32#define GPU_XVE_SPEED_2P5 (1 << 0)
33#define GPU_XVE_SPEED_5P0 (1 << 1)
34#define GPU_XVE_SPEED_8P0 (1 << 2)
35#define GPU_XVE_NR_SPEEDS 3
36
37#define GPU_XVE_SPEED_MASK (GPU_XVE_SPEED_2P5 | \
38 GPU_XVE_SPEED_5P0 | \
39 GPU_XVE_SPEED_8P0)
40
41/*
42 * The HW uses a 2 bit field where speed is defined by a number:
43 *
44 * NV_XVE_LINK_CONTROL_STATUS_LINK_SPEED_2P5 = 1
45 * NV_XVE_LINK_CONTROL_STATUS_LINK_SPEED_5P0 = 2
46 * NV_XVE_LINK_CONTROL_STATUS_LINK_SPEED_8P0 = 3
47 *
48 * This isn't ideal for a bitmap with available speeds. So the external
49 * APIs think about speeds as a bit in a bitmap and this function converts
50 * from those bits to the actual HW speed setting.
51 *
52 * @speed_bit must have only 1 bit set and must be one of the 3 available
53 * HW speeds. Not all chips support all speeds so use available_speeds() to
54 * determine what a given chip supports.
55 */
56static inline u32 xve_speed_to_hw_speed_setting(u32 speed_bit)
57{
58 if (!speed_bit ||
59 !is_power_of_2(speed_bit) ||
60 !(speed_bit & GPU_XVE_SPEED_MASK))
61 return -EINVAL;
62
63 return ilog2(speed_bit) + 1;
64}
65
66static inline const char *xve_speed_to_str(u32 speed)
67{
68 if (!speed || !is_power_of_2(speed) ||
69 !(speed & GPU_XVE_SPEED_MASK))
70 return "Unknown ???";
71
72 return speed & GPU_XVE_SPEED_2P5 ? "Gen1" :
73 speed & GPU_XVE_SPEED_5P0 ? "Gen2" :
74 speed & GPU_XVE_SPEED_8P0 ? "Gen3" :
75 "Unknown ???";
76}
77
78/*
79 * Debugging for the speed change.
80 */
81enum xv_speed_change_steps {
82 PRE_CHANGE = 0,
83 DISABLE_ASPM,
84 DL_SAFE_MODE,
85 CHECK_LINK,
86 LINK_SETTINGS,
87 EXEC_CHANGE,
88 EXEC_VERIF,
89 CLEANUP
90};
91
92#define xv_dbg(fmt, args...) \
93 gk20a_dbg(gpu_dbg_xv, fmt, ##args)
94
95#define xv_sc_dbg(step, fmt, args...) \
96 xv_dbg("[%d] %15s | " fmt, step, __stringify(step), ##args)
97
98
99#endif