summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gp106/xve_gp106.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/xve_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/xve_gp106.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c
index 9becd0f2..e77ea5c1 100644
--- a/drivers/gpu/nvgpu/gp106/xve_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -204,19 +204,19 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
204 int attempts = 10, err_status = 0; 204 int attempts = 10, err_status = 0;
205 205
206 g->ops.xve.get_speed(g, &current_link_speed); 206 g->ops.xve.get_speed(g, &current_link_speed);
207 xv_sc_dbg(PRE_CHANGE, "Executing PCIe link change."); 207 xv_sc_dbg(g, PRE_CHANGE, "Executing PCIe link change.");
208 xv_sc_dbg(PRE_CHANGE, " Current speed: %s", 208 xv_sc_dbg(g, PRE_CHANGE, " Current speed: %s",
209 xve_speed_to_str(current_link_speed)); 209 xve_speed_to_str(current_link_speed));
210 xv_sc_dbg(PRE_CHANGE, " Next speed: %s", 210 xv_sc_dbg(g, PRE_CHANGE, " Next speed: %s",
211 xve_speed_to_str(next_link_speed)); 211 xve_speed_to_str(next_link_speed));
212 xv_sc_dbg(PRE_CHANGE, " PL_LINK_CONFIG: 0x%08x", 212 xv_sc_dbg(g, PRE_CHANGE, " PL_LINK_CONFIG: 0x%08x",
213 gk20a_readl(g, xp_pl_link_config_r(0))); 213 gk20a_readl(g, xp_pl_link_config_r(0)));
214 214
215 xv_sc_dbg(DISABLE_ASPM, "Disabling ASPM..."); 215 xv_sc_dbg(g, DISABLE_ASPM, "Disabling ASPM...");
216 disable_aspm_gp106(g); 216 disable_aspm_gp106(g);
217 xv_sc_dbg(DISABLE_ASPM, " Done!"); 217 xv_sc_dbg(g, DISABLE_ASPM, " Done!");
218 218
219 xv_sc_dbg(DL_SAFE_MODE, "Putting DL in safe mode..."); 219 xv_sc_dbg(g, DL_SAFE_MODE, "Putting DL in safe mode...");
220 saved_dl_mgr = gk20a_readl(g, xp_dl_mgr_r(0)); 220 saved_dl_mgr = gk20a_readl(g, xp_dl_mgr_r(0));
221 221
222 /* 222 /*
@@ -225,12 +225,12 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
225 dl_mgr = saved_dl_mgr; 225 dl_mgr = saved_dl_mgr;
226 dl_mgr |= xp_dl_mgr_safe_timing_f(1); 226 dl_mgr |= xp_dl_mgr_safe_timing_f(1);
227 gk20a_writel(g, xp_dl_mgr_r(0), dl_mgr); 227 gk20a_writel(g, xp_dl_mgr_r(0), dl_mgr);
228 xv_sc_dbg(DL_SAFE_MODE, " Done!"); 228 xv_sc_dbg(g, DL_SAFE_MODE, " Done!");
229 229
230 nvgpu_timeout_init(g, &timeout, GPU_XVE_TIMEOUT_MS, 230 nvgpu_timeout_init(g, &timeout, GPU_XVE_TIMEOUT_MS,
231 NVGPU_TIMER_CPU_TIMER); 231 NVGPU_TIMER_CPU_TIMER);
232 232
233 xv_sc_dbg(CHECK_LINK, "Checking for link idle..."); 233 xv_sc_dbg(g, CHECK_LINK, "Checking for link idle...");
234 do { 234 do {
235 pl_link_config = gk20a_readl(g, xp_pl_link_config_r(0)); 235 pl_link_config = gk20a_readl(g, xp_pl_link_config_r(0));
236 if ((xp_pl_link_config_ltssm_status_f(pl_link_config) == 236 if ((xp_pl_link_config_ltssm_status_f(pl_link_config) ==
@@ -245,9 +245,9 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
245 goto done; 245 goto done;
246 } 246 }
247 247
248 xv_sc_dbg(CHECK_LINK, " Done"); 248 xv_sc_dbg(g, CHECK_LINK, " Done");
249 249
250 xv_sc_dbg(LINK_SETTINGS, "Preparing next link settings"); 250 xv_sc_dbg(g, LINK_SETTINGS, "Preparing next link settings");
251 pl_link_config &= ~xp_pl_link_config_max_link_rate_m(); 251 pl_link_config &= ~xp_pl_link_config_max_link_rate_m();
252 switch (next_link_speed) { 252 switch (next_link_speed) {
253 case GPU_XVE_SPEED_2P5: 253 case GPU_XVE_SPEED_2P5:
@@ -297,10 +297,10 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
297 else 297 else
298 BUG(); 298 BUG();
299 299
300 xv_sc_dbg(LINK_SETTINGS, " pl_link_config = 0x%08x", pl_link_config); 300 xv_sc_dbg(g, LINK_SETTINGS, " pl_link_config = 0x%08x", pl_link_config);
301 xv_sc_dbg(LINK_SETTINGS, " Done"); 301 xv_sc_dbg(g, LINK_SETTINGS, " Done");
302 302
303 xv_sc_dbg(EXEC_CHANGE, "Running link speed change..."); 303 xv_sc_dbg(g, EXEC_CHANGE, "Running link speed change...");
304 304
305 nvgpu_timeout_init(g, &timeout, GPU_XVE_TIMEOUT_MS, 305 nvgpu_timeout_init(g, &timeout, GPU_XVE_TIMEOUT_MS,
306 NVGPU_TIMER_CPU_TIMER); 306 NVGPU_TIMER_CPU_TIMER);
@@ -316,7 +316,7 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
316 goto done; 316 goto done;
317 } 317 }
318 318
319 xv_sc_dbg(EXEC_CHANGE, " Wrote PL_LINK_CONFIG."); 319 xv_sc_dbg(g, EXEC_CHANGE, " Wrote PL_LINK_CONFIG.");
320 320
321 pl_link_config = gk20a_readl(g, xp_pl_link_config_r(0)); 321 pl_link_config = gk20a_readl(g, xp_pl_link_config_r(0));
322 322
@@ -326,7 +326,7 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
326 xp_pl_link_config_ltssm_directive_f( 326 xp_pl_link_config_ltssm_directive_f(
327 xp_pl_link_config_ltssm_directive_change_speed_v())); 327 xp_pl_link_config_ltssm_directive_change_speed_v()));
328 328
329 xv_sc_dbg(EXEC_CHANGE, " Executing change (0x%08x)!", 329 xv_sc_dbg(g, EXEC_CHANGE, " Executing change (0x%08x)!",
330 pl_link_config); 330 pl_link_config);
331 gk20a_writel(g, xp_pl_link_config_r(0), pl_link_config); 331 gk20a_writel(g, xp_pl_link_config_r(0), pl_link_config);
332 332
@@ -348,11 +348,11 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
348 348
349 if (nvgpu_timeout_peek_expired(&timeout)) { 349 if (nvgpu_timeout_peek_expired(&timeout)) {
350 err_status = -ETIMEDOUT; 350 err_status = -ETIMEDOUT;
351 xv_sc_dbg(EXEC_CHANGE, " timeout; pl_link_config = 0x%x", 351 xv_sc_dbg(g, EXEC_CHANGE, " timeout; pl_link_config = 0x%x",
352 pl_link_config); 352 pl_link_config);
353 } 353 }
354 354
355 xv_sc_dbg(EXEC_CHANGE, " Change done... Checking status"); 355 xv_sc_dbg(g, EXEC_CHANGE, " Change done... Checking status");
356 356
357 if (pl_link_config == 0xffffffff) { 357 if (pl_link_config == 0xffffffff) {
358 WARN(1, "GPU fell of PCI bus!?"); 358 WARN(1, "GPU fell of PCI bus!?");
@@ -366,19 +366,19 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
366 366
367 link_control_status = 367 link_control_status =
368 g->ops.xve.xve_readl(g, xve_link_control_status_r()); 368 g->ops.xve.xve_readl(g, xve_link_control_status_r());
369 xv_sc_dbg(EXEC_CHANGE, " target %d vs current %d", 369 xv_sc_dbg(g, EXEC_CHANGE, " target %d vs current %d",
370 link_speed_setting, 370 link_speed_setting,
371 xve_link_control_status_link_speed_v(link_control_status)); 371 xve_link_control_status_link_speed_v(link_control_status));
372 372
373 if (err_status == -ETIMEDOUT) { 373 if (err_status == -ETIMEDOUT) {
374 xv_sc_dbg(EXEC_CHANGE, " Oops timed out?"); 374 xv_sc_dbg(g, EXEC_CHANGE, " Oops timed out?");
375 break; 375 break;
376 } 376 }
377 } while (attempts-- > 0 && 377 } while (attempts-- > 0 &&
378 link_speed_setting != 378 link_speed_setting !=
379 xve_link_control_status_link_speed_v(link_control_status)); 379 xve_link_control_status_link_speed_v(link_control_status));
380 380
381 xv_sc_dbg(EXEC_VERIF, "Verifying speed change..."); 381 xv_sc_dbg(g, EXEC_VERIF, "Verifying speed change...");
382 382
383 /* 383 /*
384 * Check that the new link speed is actually active. If we failed to 384 * Check that the new link speed is actually active. If we failed to
@@ -390,10 +390,10 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
390 if (link_speed_setting != new_link_speed) { 390 if (link_speed_setting != new_link_speed) {
391 u32 link_config = gk20a_readl(g, xp_pl_link_config_r(0)); 391 u32 link_config = gk20a_readl(g, xp_pl_link_config_r(0));
392 392
393 xv_sc_dbg(EXEC_VERIF, " Current and target speeds mismatch!"); 393 xv_sc_dbg(g, EXEC_VERIF, " Current and target speeds mismatch!");
394 xv_sc_dbg(EXEC_VERIF, " LINK_CONTROL_STATUS: 0x%08x", 394 xv_sc_dbg(g, EXEC_VERIF, " LINK_CONTROL_STATUS: 0x%08x",
395 g->ops.xve.xve_readl(g, xve_link_control_status_r())); 395 g->ops.xve.xve_readl(g, xve_link_control_status_r()));
396 xv_sc_dbg(EXEC_VERIF, " Link speed is %s - should be %s", 396 xv_sc_dbg(g, EXEC_VERIF, " Link speed is %s - should be %s",
397 xve_speed_to_str(new_link_speed), 397 xve_speed_to_str(new_link_speed),
398 xve_speed_to_str(link_speed_setting)); 398 xve_speed_to_str(link_speed_setting));
399 399
@@ -417,19 +417,19 @@ static int __do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
417 gk20a_writel(g, xp_pl_link_config_r(0), link_config); 417 gk20a_writel(g, xp_pl_link_config_r(0), link_config);
418 err_status = -ENODEV; 418 err_status = -ENODEV;
419 } else { 419 } else {
420 xv_sc_dbg(EXEC_VERIF, " Current and target speeds match!"); 420 xv_sc_dbg(g, EXEC_VERIF, " Current and target speeds match!");
421 err_status = 0; 421 err_status = 0;
422 } 422 }
423 423
424done: 424done:
425 /* Restore safe timings. */ 425 /* Restore safe timings. */
426 xv_sc_dbg(CLEANUP, "Restoring saved DL settings..."); 426 xv_sc_dbg(g, CLEANUP, "Restoring saved DL settings...");
427 gk20a_writel(g, xp_dl_mgr_r(0), saved_dl_mgr); 427 gk20a_writel(g, xp_dl_mgr_r(0), saved_dl_mgr);
428 xv_sc_dbg(CLEANUP, " Done"); 428 xv_sc_dbg(g, CLEANUP, " Done");
429 429
430 xv_sc_dbg(CLEANUP, "Re-enabling ASPM settings..."); 430 xv_sc_dbg(g, CLEANUP, "Re-enabling ASPM settings...");
431 enable_aspm_gp106(g); 431 enable_aspm_gp106(g);
432 xv_sc_dbg(CLEANUP, " Done"); 432 xv_sc_dbg(g, CLEANUP, " Done");
433 433
434 return err_status; 434 return err_status;
435} 435}