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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/sec2_gp106.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.h b/drivers/gpu/nvgpu/gp106/sec2_gp106.h
index e3da0abf..90dfc372 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.h
@@ -16,14 +16,11 @@
16 16
17int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout); 17int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout);
18int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout); 18int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout);
19void sec2_copy_to_dmem(struct nvgpu_pmu *pmu,
20 u32 dst, u8 *src, u32 size, u8 port);
21void sec2_dump_falcon_stats(struct nvgpu_pmu *pmu);
22int bl_bootstrap_sec2(struct nvgpu_pmu *pmu, 19int bl_bootstrap_sec2(struct nvgpu_pmu *pmu,
23 void *desc, u32 bl_sz); 20 void *desc, u32 bl_sz);
24void sec_enable_irq(struct nvgpu_pmu *pmu, bool enable);
25void init_pmu_setup_hw1(struct gk20a *g); 21void init_pmu_setup_hw1(struct gk20a *g);
26int init_sec2_setup_hw1(struct gk20a *g, 22int init_sec2_setup_hw1(struct gk20a *g,
27 void *desc, u32 bl_sz); 23 void *desc, u32 bl_sz);
24int gp106_sec2_reset(struct gk20a *g);
28 25
29#endif /*__SEC2_H_*/ 26#endif /*__SEC2_H_*/