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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/regops_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/regops_gp106.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.h b/drivers/gpu/nvgpu/gp106/regops_gp106.h
index 801e6f1c..45f1fb49 100644
--- a/drivers/gpu/nvgpu/gp106/regops_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/regops_gp106.h
@@ -2,7 +2,7 @@
2 * 2 *
3 * Tegra GP106 GPU Debugger Driver Register Ops 3 * Tegra GP106 GPU Debugger Driver Register Ops
4 * 4 *
5 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 5 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
6 * 6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a 7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"), 8 * copy of this software and associated documentation files (the "Software"),
@@ -26,17 +26,17 @@
26#define __REGOPS_GP106_H_ 26#define __REGOPS_GP106_H_
27 27
28const struct regop_offset_range *gp106_get_global_whitelist_ranges(void); 28const struct regop_offset_range *gp106_get_global_whitelist_ranges(void);
29int gp106_get_global_whitelist_ranges_count(void); 29u64 gp106_get_global_whitelist_ranges_count(void);
30const struct regop_offset_range *gp106_get_context_whitelist_ranges(void); 30const struct regop_offset_range *gp106_get_context_whitelist_ranges(void);
31int gp106_get_context_whitelist_ranges_count(void); 31u64 gp106_get_context_whitelist_ranges_count(void);
32const u32 *gp106_get_runcontrol_whitelist(void); 32const u32 *gp106_get_runcontrol_whitelist(void);
33int gp106_get_runcontrol_whitelist_count(void); 33u64 gp106_get_runcontrol_whitelist_count(void);
34const struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void); 34const struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void);
35int gp106_get_runcontrol_whitelist_ranges_count(void); 35u64 gp106_get_runcontrol_whitelist_ranges_count(void);
36const u32 *gp106_get_qctl_whitelist(void); 36const u32 *gp106_get_qctl_whitelist(void);
37int gp106_get_qctl_whitelist_count(void); 37u64 gp106_get_qctl_whitelist_count(void);
38const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void); 38const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void);
39int gp106_get_qctl_whitelist_ranges_count(void); 39u64 gp106_get_qctl_whitelist_ranges_count(void);
40int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s); 40int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
41 41
42#endif /* __REGOPS_GP106_H_ */ 42#endif /* __REGOPS_GP106_H_ */