diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index 308bcf04..e0114979 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c | |||
@@ -11,8 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/delay.h> /* for udelay */ | ||
15 | |||
16 | #include "gk20a/gk20a.h" | 14 | #include "gk20a/gk20a.h" |
17 | #include "gk20a/pmu_gk20a.h" | 15 | #include "gk20a/pmu_gk20a.h" |
18 | 16 | ||
@@ -70,7 +68,7 @@ static int gp106_pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) | |||
70 | gk20a_dbg_fn("done"); | 68 | gk20a_dbg_fn("done"); |
71 | return 0; | 69 | return 0; |
72 | } | 70 | } |
73 | udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); | 71 | nvgpu_udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); |
74 | } while (--retries); | 72 | } while (--retries); |
75 | 73 | ||
76 | /* If scrubbing timeout, keep PMU in reset state */ | 74 | /* If scrubbing timeout, keep PMU in reset state */ |
@@ -103,7 +101,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable) | |||
103 | 101 | ||
104 | pmu_enable_irq(pmu, false); | 102 | pmu_enable_irq(pmu, false); |
105 | gp106_pmu_enable_hw(pmu, false); | 103 | gp106_pmu_enable_hw(pmu, false); |
106 | udelay(10); | 104 | nvgpu_udelay(10); |
107 | } | 105 | } |
108 | } else { | 106 | } else { |
109 | gp106_pmu_enable_hw(pmu, true); | 107 | gp106_pmu_enable_hw(pmu, true); |
@@ -113,7 +111,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable) | |||
113 | err = pmu_idle(pmu); | 111 | err = pmu_idle(pmu); |
114 | if (err) | 112 | if (err) |
115 | return err; | 113 | return err; |
116 | udelay(5); | 114 | nvgpu_udelay(5); |
117 | pmu_enable_irq(pmu, true); | 115 | pmu_enable_irq(pmu, true); |
118 | } | 116 | } |
119 | 117 | ||
@@ -155,7 +153,7 @@ static int gp106_sec2_reset(struct gk20a *g) | |||
155 | //sec2 reset | 153 | //sec2 reset |
156 | gk20a_writel(g, psec_falcon_engine_r(), | 154 | gk20a_writel(g, psec_falcon_engine_r(), |
157 | pwr_falcon_engine_reset_true_f()); | 155 | pwr_falcon_engine_reset_true_f()); |
158 | udelay(10); | 156 | nvgpu_udelay(10); |
159 | gk20a_writel(g, psec_falcon_engine_r(), | 157 | gk20a_writel(g, psec_falcon_engine_r(), |
160 | pwr_falcon_engine_reset_false_f()); | 158 | pwr_falcon_engine_reset_false_f()); |
161 | 159 | ||