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path: root/drivers/gpu/nvgpu/gp106/hw_xve_gp106.h
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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hw_xve_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/hw_xve_gp106.h80
1 files changed, 80 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hw_xve_gp106.h b/drivers/gpu/nvgpu/gp106/hw_xve_gp106.h
index 74b6cf7c..24434ae0 100644
--- a/drivers/gpu/nvgpu/gp106/hw_xve_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/hw_xve_gp106.h
@@ -66,4 +66,84 @@ static inline u32 xve_rom_ctrl_rom_shadow_enabled_f(void)
66{ 66{
67 return 0x1; 67 return 0x1;
68} 68}
69static inline u32 xve_link_control_status_r(void)
70{
71 return 0x00000088;
72}
73static inline u32 xve_link_control_status_link_speed_m(void)
74{
75 return 0xf << 16;
76}
77static inline u32 xve_link_control_status_link_speed_v(u32 r)
78{
79 return (r >> 16) & 0xf;
80}
81static inline u32 xve_link_control_status_link_speed_link_speed_2p5_v(void)
82{
83 return 0x00000001;
84}
85static inline u32 xve_link_control_status_link_speed_link_speed_5p0_v(void)
86{
87 return 0x00000002;
88}
89static inline u32 xve_link_control_status_link_speed_link_speed_8p0_v(void)
90{
91 return 0x00000003;
92}
93static inline u32 xve_link_control_status_link_width_m(void)
94{
95 return 0x3f << 20;
96}
97static inline u32 xve_link_control_status_link_width_v(u32 r)
98{
99 return (r >> 20) & 0x3f;
100}
101static inline u32 xve_link_control_status_link_width_x1_v(void)
102{
103 return 0x00000001;
104}
105static inline u32 xve_link_control_status_link_width_x2_v(void)
106{
107 return 0x00000002;
108}
109static inline u32 xve_link_control_status_link_width_x4_v(void)
110{
111 return 0x00000004;
112}
113static inline u32 xve_link_control_status_link_width_x8_v(void)
114{
115 return 0x00000008;
116}
117static inline u32 xve_link_control_status_link_width_x16_v(void)
118{
119 return 0x00000010;
120}
121static inline u32 xve_priv_xv_r(void)
122{
123 return 0x00000150;
124}
125static inline u32 xve_priv_xv_cya_l0s_enable_f(u32 v)
126{
127 return (v & 0x1) << 7;
128}
129static inline u32 xve_priv_xv_cya_l0s_enable_m(void)
130{
131 return 0x1 << 7;
132}
133static inline u32 xve_priv_xv_cya_l0s_enable_v(u32 r)
134{
135 return (r >> 7) & 0x1;
136}
137static inline u32 xve_priv_xv_cya_l1_enable_f(u32 v)
138{
139 return (v & 0x1) << 8;
140}
141static inline u32 xve_priv_xv_cya_l1_enable_m(void)
142{
143 return 0x1 << 8;
144}
145static inline u32 xve_priv_xv_cya_l1_enable_v(u32 r)
146{
147 return (r >> 8) & 0x1;
148}
69#endif 149#endif