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path: root/drivers/gpu/nvgpu/gp106/hal_gp106.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c140
1 files changed, 73 insertions, 67 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 69516d22..f31180cd 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -59,70 +59,6 @@
59 59
60#include <nvgpu/hw/gp106/hw_proj_gp106.h> 60#include <nvgpu/hw/gp106/hw_proj_gp106.h>
61 61
62static const struct gpu_ops gp106_ops = {
63 .ltc = {
64 .determine_L2_size_bytes = gp10b_determine_L2_size_bytes,
65 .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry,
66 .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry,
67 .init_cbc = NULL,
68 .init_fs_state = gm20b_ltc_init_fs_state,
69 .init_comptags = gp10b_ltc_init_comptags,
70 .cbc_ctrl = gm20b_ltc_cbc_ctrl,
71 .isr = gp10b_ltc_isr,
72 .cbc_fix_config = NULL,
73 .flush = gm20b_flush_ltc,
74#ifdef CONFIG_DEBUG_FS
75 .sync_debugfs = gp10b_ltc_sync_debugfs,
76#endif
77 },
78 .clock_gating = {
79 .slcg_bus_load_gating_prod =
80 gp106_slcg_bus_load_gating_prod,
81 .slcg_ce2_load_gating_prod =
82 gp106_slcg_ce2_load_gating_prod,
83 .slcg_chiplet_load_gating_prod =
84 gp106_slcg_chiplet_load_gating_prod,
85 .slcg_ctxsw_firmware_load_gating_prod =
86 gp106_slcg_ctxsw_firmware_load_gating_prod,
87 .slcg_fb_load_gating_prod =
88 gp106_slcg_fb_load_gating_prod,
89 .slcg_fifo_load_gating_prod =
90 gp106_slcg_fifo_load_gating_prod,
91 .slcg_gr_load_gating_prod =
92 gr_gp106_slcg_gr_load_gating_prod,
93 .slcg_ltc_load_gating_prod =
94 ltc_gp106_slcg_ltc_load_gating_prod,
95 .slcg_perf_load_gating_prod =
96 gp106_slcg_perf_load_gating_prod,
97 .slcg_priring_load_gating_prod =
98 gp106_slcg_priring_load_gating_prod,
99 .slcg_pmu_load_gating_prod =
100 gp106_slcg_pmu_load_gating_prod,
101 .slcg_therm_load_gating_prod =
102 gp106_slcg_therm_load_gating_prod,
103 .slcg_xbar_load_gating_prod =
104 gp106_slcg_xbar_load_gating_prod,
105 .blcg_bus_load_gating_prod =
106 gp106_blcg_bus_load_gating_prod,
107 .blcg_ce_load_gating_prod =
108 gp106_blcg_ce_load_gating_prod,
109 .blcg_fb_load_gating_prod =
110 gp106_blcg_fb_load_gating_prod,
111 .blcg_fifo_load_gating_prod =
112 gp106_blcg_fifo_load_gating_prod,
113 .blcg_gr_load_gating_prod =
114 gp106_blcg_gr_load_gating_prod,
115 .blcg_ltc_load_gating_prod =
116 gp106_blcg_ltc_load_gating_prod,
117 .blcg_pmu_load_gating_prod =
118 gp106_blcg_pmu_load_gating_prod,
119 .blcg_xbar_load_gating_prod =
120 gp106_blcg_xbar_load_gating_prod,
121 .pg_gr_load_gating_prod =
122 gr_gp106_pg_gr_load_gating_prod,
123 }
124};
125
126static int gp106_get_litter_value(struct gk20a *g, int value) 62static int gp106_get_litter_value(struct gk20a *g, int value)
127{ 63{
128 int ret = -EINVAL; 64 int ret = -EINVAL;
@@ -241,6 +177,73 @@ static int gp106_init_gpu_characteristics(struct gk20a *g)
241 return 0; 177 return 0;
242} 178}
243 179
180static const struct gpu_ops gp106_ops = {
181 .ltc = {
182 .determine_L2_size_bytes = gp10b_determine_L2_size_bytes,
183 .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry,
184 .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry,
185 .init_cbc = NULL,
186 .init_fs_state = gm20b_ltc_init_fs_state,
187 .init_comptags = gp10b_ltc_init_comptags,
188 .cbc_ctrl = gm20b_ltc_cbc_ctrl,
189 .isr = gp10b_ltc_isr,
190 .cbc_fix_config = NULL,
191 .flush = gm20b_flush_ltc,
192#ifdef CONFIG_DEBUG_FS
193 .sync_debugfs = gp10b_ltc_sync_debugfs,
194#endif
195 },
196 .clock_gating = {
197 .slcg_bus_load_gating_prod =
198 gp106_slcg_bus_load_gating_prod,
199 .slcg_ce2_load_gating_prod =
200 gp106_slcg_ce2_load_gating_prod,
201 .slcg_chiplet_load_gating_prod =
202 gp106_slcg_chiplet_load_gating_prod,
203 .slcg_ctxsw_firmware_load_gating_prod =
204 gp106_slcg_ctxsw_firmware_load_gating_prod,
205 .slcg_fb_load_gating_prod =
206 gp106_slcg_fb_load_gating_prod,
207 .slcg_fifo_load_gating_prod =
208 gp106_slcg_fifo_load_gating_prod,
209 .slcg_gr_load_gating_prod =
210 gr_gp106_slcg_gr_load_gating_prod,
211 .slcg_ltc_load_gating_prod =
212 ltc_gp106_slcg_ltc_load_gating_prod,
213 .slcg_perf_load_gating_prod =
214 gp106_slcg_perf_load_gating_prod,
215 .slcg_priring_load_gating_prod =
216 gp106_slcg_priring_load_gating_prod,
217 .slcg_pmu_load_gating_prod =
218 gp106_slcg_pmu_load_gating_prod,
219 .slcg_therm_load_gating_prod =
220 gp106_slcg_therm_load_gating_prod,
221 .slcg_xbar_load_gating_prod =
222 gp106_slcg_xbar_load_gating_prod,
223 .blcg_bus_load_gating_prod =
224 gp106_blcg_bus_load_gating_prod,
225 .blcg_ce_load_gating_prod =
226 gp106_blcg_ce_load_gating_prod,
227 .blcg_fb_load_gating_prod =
228 gp106_blcg_fb_load_gating_prod,
229 .blcg_fifo_load_gating_prod =
230 gp106_blcg_fifo_load_gating_prod,
231 .blcg_gr_load_gating_prod =
232 gp106_blcg_gr_load_gating_prod,
233 .blcg_ltc_load_gating_prod =
234 gp106_blcg_ltc_load_gating_prod,
235 .blcg_pmu_load_gating_prod =
236 gp106_blcg_pmu_load_gating_prod,
237 .blcg_xbar_load_gating_prod =
238 gp106_blcg_xbar_load_gating_prod,
239 .pg_gr_load_gating_prod =
240 gr_gp106_pg_gr_load_gating_prod,
241 },
242 .get_litter_value = gp106_get_litter_value,
243 .chip_init_gpu_characteristics = gp106_init_gpu_characteristics,
244 .bios_init = gm206_bios_init,
245};
246
244int gp106_init_hal(struct gk20a *g) 247int gp106_init_hal(struct gk20a *g)
245{ 248{
246 struct gpu_ops *gops = &g->ops; 249 struct gpu_ops *gops = &g->ops;
@@ -251,6 +254,12 @@ int gp106_init_hal(struct gk20a *g)
251 gops->ltc = gp106_ops.ltc; 254 gops->ltc = gp106_ops.ltc;
252 gops->clock_gating = gp106_ops.clock_gating; 255 gops->clock_gating = gp106_ops.clock_gating;
253 256
257 /* Lone functions */
258 gops->get_litter_value = gp106_ops.get_litter_value;
259 gops->chip_init_gpu_characteristics =
260 gp106_ops.chip_init_gpu_characteristics;
261 gops->bios_init = gp106_ops.bios_init;
262
254 gops->privsecurity = 1; 263 gops->privsecurity = 1;
255 gops->securegpccs = 1; 264 gops->securegpccs = 1;
256 gops->pmupstate = true; 265 gops->pmupstate = true;
@@ -277,13 +286,10 @@ int gp106_init_hal(struct gk20a *g)
277#if defined(CONFIG_GK20A_CYCLE_STATS) 286#if defined(CONFIG_GK20A_CYCLE_STATS)
278 gk20a_init_css_ops(gops); 287 gk20a_init_css_ops(gops);
279#endif 288#endif
280 gm206_init_bios_ops(gops);
281 gp106_init_therm_ops(gops); 289 gp106_init_therm_ops(gops);
282 gp106_init_xve_ops(gops); 290 gp106_init_xve_ops(gops);
283 291
284 g->name = "gp10x"; 292 g->name = "gp10x";
285 gops->get_litter_value = gp106_get_litter_value;
286 gops->chip_init_gpu_characteristics = gp106_init_gpu_characteristics;
287 gops->gr_ctx.use_dma_for_fw_bootstrap = true; 293 gops->gr_ctx.use_dma_for_fw_bootstrap = true;
288 294
289 c->twod_class = FERMI_TWOD_A; 295 c->twod_class = FERMI_TWOD_A;
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-02 21:06:17 -0400