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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/clk_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/clk_gp106.h65
1 files changed, 65 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.h b/drivers/gpu/nvgpu/gp106/clk_gp106.h
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1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#ifndef CLK_GP106_H
23#define CLK_GP106_H
24
25#include <nvgpu/lock.h>
26
27#define CLK_NAMEMAP_INDEX_GPC2CLK 0x00
28#define CLK_NAMEMAP_INDEX_XBAR2CLK 0x02
29#define CLK_NAMEMAP_INDEX_SYS2CLK 0x07 /* SYSPLL */
30#define CLK_NAMEMAP_INDEX_DRAMCLK 0x20 /* DRAMPLL */
31
32#define CLK_DEFAULT_CNTRL_SETTLE_RETRIES 10
33#define CLK_DEFAULT_CNTRL_SETTLE_USECS 5
34
35#define XTAL_CNTR_CLKS 27000 /* 1000usec at 27KHz XTAL */
36#define XTAL_CNTR_DELAY 1000 /* we need acuracy up to the ms */
37#define XTAL_SCALE_TO_KHZ 1
38
39
40
41struct namemap_cfg {
42 u32 namemap;
43 u32 is_enable; /* Namemap enabled */
44 u32 is_counter; /* Using cntr */
45 struct gk20a *g;
46 union {
47 struct {
48 u32 reg_ctrl_addr;
49 u32 reg_ctrl_idx;
50 u32 reg_cntr_addr;
51 } cntr;
52 struct {
53 /* Todo */
54 } pll;
55 };
56 u32 scale;
57 char name[24];
58};
59
60int gp106_init_clk_support(struct gk20a *g);
61u32 gp106_crystal_clk_hz(struct gk20a *g);
62unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain);
63int gp106_suspend_clk_support(struct gk20a *g);
64
65#endif /* CLK_GP106_H */