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path: root/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/clk_arb_gp106.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
index 112cb588..d1cbb32b 100644
--- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
@@ -23,7 +23,7 @@ static u32 gp106_get_arbiter_clk_domains(struct gk20a *g)
23} 23}
24 24
25static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, 25static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
26 u64 *min_hz, u64 *max_hz) 26 u16 *min_mhz, u16 *max_mhz)
27{ 27{
28 enum nv_pmu_clk_clkwhich clkwhich; 28 enum nv_pmu_clk_clkwhich clkwhich;
29 struct clk_set_info *p0_info; 29 struct clk_set_info *p0_info;
@@ -52,14 +52,14 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
52 if (!p0_info) 52 if (!p0_info)
53 return -EINVAL; 53 return -EINVAL;
54 54
55 *min_hz = (u64)(p5_info->min_mhz) * (u64)MHZ; 55 *min_mhz = p5_info->min_mhz;
56 *max_hz = (u64)(p0_info->max_mhz) * (u64)MHZ; 56 *max_mhz = p0_info->max_mhz;
57 57
58 return 0; 58 return 0;
59} 59}
60 60
61static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, 61static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain,
62 u64 *default_hz) 62 u16 *default_mhz)
63{ 63{
64 enum nv_pmu_clk_clkwhich clkwhich; 64 enum nv_pmu_clk_clkwhich clkwhich;
65 struct clk_set_info *p0_info; 65 struct clk_set_info *p0_info;
@@ -82,7 +82,7 @@ static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain,
82 if (!p0_info) 82 if (!p0_info)
83 return -EINVAL; 83 return -EINVAL;
84 84
85 *default_hz = (u64)p0_info->max_mhz * (u64)MHZ; 85 *default_mhz = p0_info->max_mhz;
86 86
87 return 0; 87 return 0;
88} 88}