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path: root/drivers/gpu/nvgpu/gp106/acr_gp106.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gp106/acr_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/acr_gp106.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c
index a578c4a0..5c4afef9 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c
@@ -76,7 +76,7 @@ static get_ucode_details pmu_acr_supp_ucode_list[] = {
76 gpccs_ucode_details, 76 gpccs_ucode_details,
77}; 77};
78 78
79void gp106_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf) 79static void gp106_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf)
80{ 80{
81 inf->wpr_base = GP106_DGPU_WPR; 81 inf->wpr_base = GP106_DGPU_WPR;
82 inf->nonwpr_base = GP106_DGPU_NONWPR; 82 inf->nonwpr_base = GP106_DGPU_NONWPR;
@@ -89,7 +89,7 @@ static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
89 dma_addr->hi |= u64_hi32(value); 89 dma_addr->hi |= u64_hi32(value);
90} 90}
91 91
92int gp106_alloc_blob_space(struct gk20a *g, 92static int gp106_alloc_blob_space(struct gk20a *g,
93 size_t size, struct mem_desc *mem) 93 size_t size, struct mem_desc *mem)
94{ 94{
95 struct wpr_carveout_info wpr_inf; 95 struct wpr_carveout_info wpr_inf;
@@ -117,7 +117,7 @@ void gp106_init_secure_pmu(struct gpu_ops *gops)
117} 117}
118/* TODO - check if any free blob res needed*/ 118/* TODO - check if any free blob res needed*/
119 119
120int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) 120static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
121{ 121{
122 const struct firmware *pmu_fw, *pmu_desc, *pmu_sig; 122 const struct firmware *pmu_fw, *pmu_desc, *pmu_sig;
123 struct pmu_gk20a *pmu = &g->pmu; 123 struct pmu_gk20a *pmu = &g->pmu;
@@ -184,7 +184,7 @@ release_img_fw:
184 return err; 184 return err;
185} 185}
186 186
187int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) 187static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
188{ 188{
189 u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; 189 u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
190 struct lsf_ucode_desc_v1 *lsf_desc; 190 struct lsf_ucode_desc_v1 *lsf_desc;
@@ -262,7 +262,8 @@ rel_sig:
262 release_firmware(fecs_sig); 262 release_firmware(fecs_sig);
263 return err; 263 return err;
264} 264}
265int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) 265
266static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
266{ 267{
267 u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; 268 u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
268 struct lsf_ucode_desc_v1 *lsf_desc; 269 struct lsf_ucode_desc_v1 *lsf_desc;
@@ -345,7 +346,7 @@ rel_sig:
345 return err; 346 return err;
346} 347}
347 348
348int gp106_prepare_ucode_blob(struct gk20a *g) 349static int gp106_prepare_ucode_blob(struct gk20a *g)
349{ 350{
350 351
351 int err; 352 int err;
@@ -1008,7 +1009,7 @@ static int lsf_gen_wpr_requirements(struct gk20a *g,
1008 1009
1009/*Loads ACR bin to FB mem and bootstraps PMU with bootloader code 1010/*Loads ACR bin to FB mem and bootstraps PMU with bootloader code
1010 * start and end are addresses of ucode blob in non-WPR region*/ 1011 * start and end are addresses of ucode blob in non-WPR region*/
1011int gp106_bootstrap_hs_flcn(struct gk20a *g) 1012static int gp106_bootstrap_hs_flcn(struct gk20a *g)
1012{ 1013{
1013 struct mm_gk20a *mm = &g->mm; 1014 struct mm_gk20a *mm = &g->mm;
1014 struct vm_gk20a *vm = &mm->pmu.vm; 1015 struct vm_gk20a *vm = &mm->pmu.vm;