diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 3 |
3 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 1bc51a7c..0d69b5da 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <nvgpu/firmware.h> | 28 | #include <nvgpu/firmware.h> |
29 | #include <nvgpu/pmu.h> | 29 | #include <nvgpu/pmu.h> |
30 | #include <nvgpu/falcon.h> | 30 | #include <nvgpu/falcon.h> |
31 | #include <nvgpu/enabled.h> | ||
31 | 32 | ||
32 | #include <nvgpu/linux/dma.h> | 33 | #include <nvgpu/linux/dma.h> |
33 | 34 | ||
@@ -267,7 +268,7 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
267 | struct nvgpu_firmware *gpccs_sig; | 268 | struct nvgpu_firmware *gpccs_sig; |
268 | int err; | 269 | int err; |
269 | 270 | ||
270 | if (g->ops.securegpccs == false) | 271 | if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) |
271 | return -ENOENT; | 272 | return -ENOENT; |
272 | 273 | ||
273 | gpccs_sig = nvgpu_request_firmware(g, T18x_GPCCS_UCODE_SIG, 0); | 274 | gpccs_sig = nvgpu_request_firmware(g, T18x_GPCCS_UCODE_SIG, 0); |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index bd9b627f..5d9cc32c 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -758,7 +758,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | |||
758 | g->ops.pmu.lsfloadedfalconid = 0; | 758 | g->ops.pmu.lsfloadedfalconid = 0; |
759 | if (g->ops.pmu.fecsbootstrapdone) { | 759 | if (g->ops.pmu.fecsbootstrapdone) { |
760 | /* this must be recovery so bootstrap fecs and gpccs */ | 760 | /* this must be recovery so bootstrap fecs and gpccs */ |
761 | if (!g->ops.securegpccs) { | 761 | if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) { |
762 | gr_gm20b_load_gpccs_with_bootloader(g); | 762 | gr_gm20b_load_gpccs_with_bootloader(g); |
763 | err = g->ops.pmu.load_lsfalcon_ucode(g, | 763 | err = g->ops.pmu.load_lsfalcon_ucode(g, |
764 | (1 << LSF_FALCON_ID_FECS)); | 764 | (1 << LSF_FALCON_ID_FECS)); |
@@ -777,7 +777,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | |||
777 | } else { | 777 | } else { |
778 | /* cold boot or rg exit */ | 778 | /* cold boot or rg exit */ |
779 | g->ops.pmu.fecsbootstrapdone = true; | 779 | g->ops.pmu.fecsbootstrapdone = true; |
780 | if (!g->ops.securegpccs) { | 780 | if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) { |
781 | gr_gm20b_load_gpccs_with_bootloader(g); | 781 | gr_gm20b_load_gpccs_with_bootloader(g); |
782 | } else { | 782 | } else { |
783 | /* bind WPR VA inst block */ | 783 | /* bind WPR VA inst block */ |
@@ -797,7 +797,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | |||
797 | } | 797 | } |
798 | 798 | ||
799 | /*start gpccs */ | 799 | /*start gpccs */ |
800 | if (g->ops.securegpccs) { | 800 | if (nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) { |
801 | gk20a_writel(g, reg_offset + | 801 | gk20a_writel(g, reg_offset + |
802 | gr_fecs_cpuctl_alias_r(), | 802 | gr_fecs_cpuctl_alias_r(), |
803 | gr_gpccs_cpuctl_startcpu_f(1)); | 803 | gr_gpccs_cpuctl_startcpu_f(1)); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 7415e6c1..01e277ce 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -351,8 +351,9 @@ int gm20b_init_hal(struct gk20a *g) | |||
351 | gm20b_ops.chip_init_gpu_characteristics; | 351 | gm20b_ops.chip_init_gpu_characteristics; |
352 | gops->get_litter_value = gm20b_ops.get_litter_value; | 352 | gops->get_litter_value = gm20b_ops.get_litter_value; |
353 | 353 | ||
354 | gops->securegpccs = false; | 354 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); |
355 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); | 355 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); |
356 | |||
356 | #ifdef CONFIG_TEGRA_ACR | 357 | #ifdef CONFIG_TEGRA_ACR |
357 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { | 358 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { |
358 | gops->privsecurity = 1; | 359 | gops->privsecurity = 1; |